AWT6221R
Table 5: Electrical Specifications - PCS Band
(T
C
= +25 °C, V
BATT
= V
CC
= +3.4 V, V
ENABLE
= +2.4 V, 50
Ω
system)
PARAMETER
MIN
24.5
12
-
-
-
-
35
15
-
-
-
-
-
(2)
TYP
26.5
14.0
-41
-42
-55
-54
38.5
17.5
8
0.35
0.35
2.5
<1
-137
140
-42
-46
-
MAX
29.0
17.0
-37.5
-38
-48
-48
-
-
13
0.8
0.8
5
5
-135
-138
-35
-35
2:1
UNIT
COMMENTS
P
OUT
+29.5 dBm
+16 dBm
+29.5 dBm
+16 dBm
+29.5 dBm
+16 dBm
+29.5 dBm
+16 dBm
V
MODE1
= +2.4 V
through V
MODE
pins, V
MODE
= +2.4 V
through
V
ENABLE
pin
through V
BATT
pin,
V
MODE1
= 2.4 V
V
BATT
= +4.2 V, V
CC
= +4.2 V,
V
ENABLE
= 0 V, V
MODE1
= 0 V
P
OUT
= +29.5 dBm, V
MODE1
= 0 V
P
OUT
= +16 dBm, V
MODE1
= 2.4 V
V
MODE1
0V
2.4 V
0V
2.4 V
0V
2.4 V
0V
2.4 V
Gain
ACLR1 at 5 MHz offset
(1)
ACLR2 at 10 MHz offset
Power-Added Efficiency
(1)
Quiescent Current (Icq)
Low Bias Mode
Mode Control Current
Enable Current
BATT Current
Leakage Current
Noise in Receive Band
Harmonics
2fo
3fo, 4fo
Input Impedance
dB
dBc
dBc
%
mA
mA
mA
mA
µA
dBm/Hz
-
-
-
-
-
dBc
VSWR
P
OUT
<
+29.5 dBm
In-band load VSWR < 5:1
Out-of-band load VSWR < 10:1
Applies over all operating
conditions
Applies over full operating range
Spurious Output Level
(all spurious outputs)
-
-
-70
dBc
Load mismatch stress with no
permanent degradation or failure
8:1
-
-
VSWR
Notes:
(1) ACLR and Efficiency measured at 1880 MHz.
(2) 1930 MHz to 1990 MHz.
Data Sheet - Rev 2.3
11/2008
5