AWT6321
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site:
http://www.anadigics.com
Shutdown Mode
The power amplifier may be placed in a shutdown
mode by applying logic low levels (see Operating
Ranges table) to the V
ENABLE
and V
MODE
voltages.
Bias Modes
The power amplifier may be placed in either a Low Bias
mode or a High Bias mode by applying the appropriate
logic level (see Operating Ranges table) to the V
MODE
voltages. The Bias Control table lists the recommended
modes of operation for various applications.
Table 6: Bias Control
APPLICATION
CDMA - low power
CDMA - high power
Optional lower V
CC
in low power
mode
Shutdown
P
OUT
LEVELS
<
+16 dBm
> +16 dBm
<
+7 dBm
-
BIAS
MODE
Low
High
Low
Shutdown
V
ENABLE
+2.4 V
+2.4 V
+2.4 V
0V
V
MODE
+2.4 V
0V
+2.4 V
0V
V
CC
3.2 - 4.2 V
3.2 - 4.2 V
1.5 V
3.2 - 4.2 V
V
BATT
> 3.2 V
> 3.2 V
> 3.2 V
> 3.2 V
GND
at
slug (pad)
V
EN_CELL
(1)
0.01
F
(2)
1
Bias
Control
2
14
GND
(2)
RF
IN_CELL
TRL1
13
TRL2
68 pF
RF
OUT_CELL
V
MODE
3
12
1000 pF
(3)
V
CC
V
BATT
2.2
F
4
11
TRL5
10
F
N/C
5
(1)
10
GND
RF
IN_PCS
(2)
TRL3
6
Bias
Control
9
GND
(2)
V
EN_PCS
0.01
F
7
8
TRL4
15 pF
RF
OUT_PCS
GND
Note:
(1) Add blocking cap if DC voltage is present on input pin.
(2) TRL should be short and of 50
characteristic impedance.
(3) TRL 5 should be as long as possible (minimum of 0.1
at 800 MHz) and capable of handling 1200 mA current.
Figure 3: Application Circuit
6
Data Sheet - Rev 2.2
10/2008
ANADIGICS [ ANADIGICS, INC ]
