AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
ture; this could cause problems for circuit opera-
tion. X7R and X5R dielectrics are much more desir-
able. The temperature tolerance of X7R dielectric
is better than ±15%. Capacitor area is another
contributor to ESR. Capacitors which are physical-
ly large in size will have a lower ESR when com-
pared to a smaller sized capacitor of an equivalent
material and capacitance value. These larger
devices can improve circuit transient response
when compared to an equal value capacitor in a
smaller package size. Consult capacitor vendor
data sheets carefully when selecting capacitors for
LDO regulators.
current exceeds the internal threshold limit. Under
short-circuit conditions, the output of the LDO reg-
ulator will be current limited until the short-circuit
condition is removed from the output or LDO regu-
lator package power dissipation exceeds the
device thermal limit.
Thermal Protection
The AAT3242 has an internal thermal protection cir-
cuit which will turn on when the device die temper-
ature exceeds 145°C. The LDO regulator output will
remain in a shutdown state until the internal die
temperature falls back below the 145°C trip point.
The combination and interaction between the short-
circuit and thermal protection systems allows the
LDO regulators to withstand indefinite short-circuit
conditions without sustaining permanent damage.
POK Output
The AAT3242 features integrated Power OK com-
parators which can be used as an error flag. The
POK open drain output goes low when output volt-
age is 6% (typ) below its nominal regulation volt-
age. Additionally, any time one of the regulators is
in shutdown, the respective POK output is pulled
low. Connect a pull-up resistor from POKA to
OUTA, and POKB to OUTB.
No-Load Stability
The AAT3242 is designed to maintain output volt-
age regulation and stability under operational no
load conditions. This is an important characteristic
for applications where the output current may drop
to zero.
Enable Function
The AAT3242 features an LDO regulator enable/dis-
able function. Each LDO has its own dedicated
enable pin. These pins (EN) are active high and are
compatible with CMOS logic. To assure the LDO
regulators will switch on, the ENA/B must be greater
than 1.6V. The LDO regulators will shut down when
the voltage on the ENA/B pins falls below 0.6V. In
shutdown, the AAT3242 will consume less than
1.0µA of current. If the enable function is not need-
ed in a specific application, it may be tied to V
IN
to
keep the LDO regulator in a continuously on state.
When the LDO regulators are in shutdown mode,
an internal 20Ω resistor is connected between
V
OUT
and GND. This is intended to discharge C
OUT
when the LDO regulators are disabled. The internal
20Ω has no adverse effects on device turn-on time.
Reverse Output-to-Input Voltage
Conditions and Protection
Under normal operating conditions, a parasitic diode
exists between the output and input of the LDO reg-
ulator. The input voltage should always remain
greater than the output load voltage maintaining a
reverse bias on the internal parasitic diode.
Conditions where V
OUT
might exceed V
IN
should be
avoided since this would forward bias the internal
parasitic diode and allow excessive current flow into
the V
OUT
pin, possibly damaging the LDO regulator.
In applications where there is a possibility of V
OUT
exceeding V
IN
for brief amounts of time during nor-
mal operation, the use of a larger value C
IN
capaci-
tor is highly recommended. A larger value of C
IN
with
respect to C
OUT
will effect a slower C
IN
decay rate
during shutdown, thus preventing V
OUT
from
exceeding V
IN
. In applications where there is a
greater danger of V
OUT
exceeding V
IN
for extended
periods of time, it is recommended to place a
Short Circuit Protection
The AAT3242 contains an internal short-circuit pro-
tection circuit that will trigger when the output load
3242.2005.01.1.4
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