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APW7061KC-TR 参数 Datasheet PDF下载

APW7061KC-TR图片预览
型号: APW7061KC-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 同步降压PWM控制器 [Synchronous Buck PWM Controller]
分类和应用: 控制器
文件页数/大小: 17 页 / 285 K
品牌: ANPEC [ ANPEC ELECTRONICS COROPRATION ]
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APW7061
Application Information (Cont.)
Inductor Selection (Cont.)
into lower output ripple voltage. The ripple current and
ripple voltage can be approximated by:
I
RIPPLE
=
V
IN
- V
OUT
Fs x L
x
V
OUT
V
IN
F
ESR
F
LC
The poles and zero of this transfer function are:
=
=
1
2
× π ×
L
×
C
OUT
1
2
× π ×
ESR
×
C
OUT
∆V
OUT
= I
RIPPLE
x ESR
where Fs is the switching frequency of the regulator.
There is a tradeoff exists between the inductor’ ripple
s
current and the regulator load transient response time
A smaller inductor will give the regulator a faster load
trans ient res ponse at the expens e of higher ripple
current and vice versa. The maximum ripple current
occurs at the maximum input voltage. A good starting
point is to choose the ripple current to be approximately
30% of the maximum output current.
Once the induct ance value has been chosen, s elect
an inductor that is capable of carrying the required
peak current without going into s aturation. In s ome
ty pe of induc tors, es pec ially core that is make of
ferrite, the ripple current will increase abruptly when it
saturates. This will result in a larger output ripple
voltage.
Compensation
The output LC filter introduces a double pole, which
contributes wit h – 40dB/decade gain slope and 180
degrees phase shift in the control loop. A compensation
network between COMP pin and ground should be
added. The simplest loop compensation network is
shown in Figure. 4.
The out put LC filter consist s of the output induc tor
and output capacitors. The transfer function of the LC
filter is given by:
GAIN
LC
The F
LC
is the double poles of the LC filter, and F
ESR
is
the zero introduced by the ESR of the output capacitor.
PHASE
L
C
OUT
ESR
Output
Figure 1. The Output LC Filter
F
LC
-40dB/dec
F
ESR
Gain
-20dB/dec
Frequency
Figure 2. The Output LC Filter Gain & Frequency
The PWM modulator is shown in Figure. 3. The input
is the output of the error amplifier and the output is the
P HA SE node. The trans fer func tion of t he PW M
modulator is given by:
=
1
+
s
×
ESR
×
C
OUT
s
2
×
L
×
C
OUT
+
s
×
ESR
+
1
GAIN
PWM
=
V
IN
V
OSC
C opyright
©
ANPEC Electronics C orp.
Rev. A.7 - Nov., 2005
11
www.anpec.com.tw