AVXX32E -A SERIES
Pin Description
Pin Name
VDD
TEST
OSC
OKY
TG0, TG1
TG3_OPC
OPB
OPA
PWM1,
PWM2
VSS
I/O
Power
In
In
In
In
In
Out
Out
Out
Out
Power
Description
Positive power supply
Test enable pad, high-active, pull-low
With resister connected to VDD for system clock generating
Trigger input, active-high, with internal pull_low resistor. Can define
as sequential key or random key.
Trigger input, active-high with internal pull_low resistor.
Trigger input, active-high
Status output
Status output
Status output
Voltage output to drive speaker or buzzer
Negative power supply
Absolute Maximum Rating
Symbol
V
DD
~V
SS
V
IN
(for input)
V
OUT
(for all outputs)
T (operating)
T (storage)
Rating
-0.5 ~ +0.5
V
SS
-0.3 < V
IN
< V
DD
+0.3
V
SS
< V
OUT
< V
DD
-10 ~ +60
-55 ~ +125
Unit
V
V
V
DC Characteristics
Symbol
V
DD
Isb
Iop
I
OL
Ioh
d F/F
Parameter
Min Typ. Max Unit
Condition
Operating Voltage
2.4 3.0 5.0
V
A V
DD
=3.0V, I/O open
Standby
1
Supply
Current
A V
DD
=3.0V, No loading
Operating
400
OPA, OPB source Current
–20
mA V
DD
=3.0V, V
IP
=2.7V
OPA, OPB sink Current
20
mA V
DD
=3.0V, V
OP
=0.3V
V
DD
=4.5V
Frequency Variation by diff.
10 %
lot
f
OSC
=384kHz
Function Diagram
1. OPA/B/C (1:0) are the output options.
Output
OPA
Option
Status
LED
OPB
Status
LED
OPC
Status
LED
0(00)
BH
+Fast
BH
-Fast
BH
+Fast
1(01)
DL
+Slow
DL
-Slow
DL
+Slow
2(10)
SH
Dy07
SH
Dy09
BL
ON
3(11)
DH
OFF
DH
ON
DH
OFF
Status output mode:
SH: Single pulse output, hi-level output
BH: Busy output, hi-level output
Preliminary
9-2
Ver. 0.1
APLUS [ APLUS INTERGRATED CIRCUITS ]
