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ATH15T05-9J 参数 Datasheet PDF下载

ATH15T05-9J图片预览
型号: ATH15T05-9J
PDF下载: 下载PDF文件 查看货源
内容描述: 15 -A , 5 - V输入非隔离宽输出调节电源模块 [15-A, 5-V Input Non-Isolated Wide-Output Adjust Power Module]
分类和应用: 电源电路
文件页数/大小: 14 页 / 836 K
品牌: ASTEC [ Astec America, Inc ]
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ATH15T05 Series —5-V Input
15-A, 5-V Input Non-Isolated
Wide-Output Adjust Power Module
REVISION 00 (3DEC2003)
Features
Up to 15-A Output Current
5-V Input Voltage
Wide-Output Voltage Adjust
(0.8 V to 3.6 V)
Efficiencies up to 96 %
160 W/in³ Power Density
On/Off Inhibit
Output Voltage Sense
Pre-Bias Startup
Margin Up/Down Controls
Auto-Track™ Sequencing
Under-Voltage Lockout
Output Over-Current Protection
(Non-Latching, Auto-Reset)
Surface Mountable
Operating Temp: –40 to +85 °C
DSP Compatible Output Voltages
IPC Lead Free 2
Point-of-Load Alliance (POLA)
Compatible
NOMINAL SIZE =
1.37 in x 0.62 in
(34,8 mm x 15,75 mm)
Description
The ATH15T05 series of non-isolated
power modules are small in size but big on
performance and flexibility. Their high
output current, compact footprint, and
industry-leading features offers system
designers a versatile module for powering
complex multi-processor digital systems.
The series employs double-sided surface
mount construction and provides high-
performance step-down power conversion
for up to 15 A of output current from a
5-V input bus voltage. The output volt-
age of the ATH15T05 can be set to any
value over the range, 0.8 V to 3.6 V, using
a single resistor.
This series includes Auto-Track™.
Auto-Track simplifies the task of supply
voltage sequencing in a power system by
enabling modules to track each other, or
any external voltage, during power up and
power down.
Other operating features include an
on/off inhibit, output voltage adjust (trim),
and margin up/down controls. To ensure
tight load regulation, an output voltage
sense is also provided. A non-latching
over-current trip serves as load fault
protection.
Target applications include complex
multi-voltage, multi-processor systems
that incorporate the industry’s high-speed
DSPs, micro-processors and bus drivers.
Pin Configuration
Pin
1
2
3
4
5
6
7
8
9
10
Function
GND
V
in
Inhibit *
V
o
Adjust
V
o
Sense
V
out
GND
Track
Margin Down *
Margin Up *
* Denotes negative logic:
Open
= Normal operation
Ground = Function active
k™
-Trac g
Auto ncin
e
Sequ
Standard Application
Track
Margin Down
Margin Up
1
10
9
8
7
V
o
Adjust
ATH15T05-9S
PTH05010
V
IN
(Top View)
2
3
4
5
6
V
OUT
Inhibit
R
SET
(Required)
0.1 W, 1 %
V
o
Sense
L
O
A
D
GND
North America (USA): 1-888-41-ASTEC
Europe (UK): 44(1384)842-211
+
C
IN
470 µF
(Required)
C
OUT
330 µF
(Optional)
+
GND
R
set
= Resistor to set the desired output
voltage (see spec. table for values)
Cin = Required electrolytic 470 µF
Cout = Recommended 330 µF electrolytic
Asia (HK): 852-2437-9662