AT28C256
Features
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Fast Read Access Time - 150 ns
Automatic Page Write Operation
Internal Address and Data Latches for 64-Bytes
Internal Control Timer
Fast Write Cycle Times
Page Write Cycle Time: 3 ms or 10 ms Maximum
1 to 64-Byte Page Write Operation
Low Power Dissipation
50 mA Active Current
200
µA
CMOS Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Endurance: 10
4
or 10
5
Cycles
Data Retention: 10 Years
Single 5V
±
10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-Wide Pinout
Full Military, Commercial, and Industrial Temperature Ranges
256K (32K x 8)
Paged
CMOS
E
2
PROM
Description
The AT28C256 is a high-performance Electrically Erasable and Programmable Read
Only Memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-
tured with Atmel’s advanced nonvolatile CMOS technology, the device offers access
times to 150 ns with power dissipation of just 440 mW. When the device is deselected,
the CMOS standby current is less than 200
µA.
(continued)
Pin Configurations
Pin Name
A0 - A14
CE
OE
WE
I/O0 - I/O7
NC
DC
Function
Addresses
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
Don’t Connect
TSOP
Top View
AT28C256
PGA
Top View
LCC, PLCC
Top View
CERDIP, PDIP,
FLATPACK, SOIC
Top View
Note: PLCC package pins 1 and
17 are DON’T CONNECT.
0006F
2-217
ATMEL [ ATMEL CORPORATION ]
