ATmega640/1280/1281/2560/2561
2. Overview
The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the
AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing
the system designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Block Diagram
PF7..0
VCC
Figure 2-1.
PK7..0
PJ7..0
PE7..0
RESET
Power
Supervision
POR / BOD &
RESET
PORT F (8)
PORT K (8)
PORT J (8)
PORT E (8)
GND
Watchdog
Timer
Watchdog
Oscillator
JTAG
A/D
Converter
Analog
Comparator
USART 0
XTAL1
Oscillator
Circuits /
Clock
Generation
EEPROM
Internal
Bandgap reference
16bit T/C 3
XTAL2
CPU
16bit T/C 5
USART 3
PA7..0
PORT A (8)
16bit T/C 4
USART 1
PG5..0
PORT G (6)
XRAM
FLASH
SRAM
16bit T/C 1
PC7..0
PORT C (8)
TWI
SPI
8bit T/C 0
8bit T/C 2
USART 2
NOTE:
Shaded parts only available
in the 100-pin version.
Complete functionality for
the ADC, T/C4, and T/C5 only
available in the 100-pin version.
PORT D (8)
PORT B (8)
PORT H (8)
PORT L (8)
PD7..0
PB7..0
PH7..0
PL7..0
5
2549LS–AVR–08/07