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AS5C4008F-20/H 参数 Datasheet PDF下载

AS5C4008F-20/H图片预览
型号: AS5C4008F-20/H
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8 SRAM SRAM存储器阵列 [512K x 8 SRAM SRAM MEMORY ARRAY]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 17 页 / 113 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SRAM
Austin Semiconductor, Inc.
512K x 8 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATION
• SMD 5962-95600
• SMD 5962-95613
• MIL STD-883
AS5C4008
PIN ASSIGNMENT
(Top View)
32-Pin DIP (CW), 32-Pin LCC (EC)
32-Pin SOJ (ECJ)
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/O7
I/O6
I/O5
I/O4
I/O3
FEATURES
High Speed: 12, 15, 17, 20, 25, 35 and 45ns
High-performance, low power military grade device
Single +5V ±10% power supply
Easy memory expansion with CE\ and OE\ options
All inputs and outputs are TTL-compatible
Ease of upgradability from 1 Meg using the 32 pin
evolutionary version.
OPTIONS
Timing
12ns access
15ns access
17ns access
20ns access
25ns access
35ns access
45ns access
Operating Temperature Range
Military: -55
o
C to +125
o
C
Industrial: -40
o
C to +85
o
C
Packages
Ceramic Dip (600 mil)
Ceramic Flatpack
Ceramic LCC
Ceramic SOJ
Ceramic LCC (contact factory)
• Options
2V data retention/ low power
MARKING
-12
-15
-17
-20
-25
-35
-45
XT
IT
CW
F
EC
ECJ
ECA
L
No. 112
No. 304
No. 209
No. 502
No. 208
32-Pin Flat Pack (F)
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/O7
I/O6
I/O5
I/O4
I/O3
GENERAL DESCRIPTION
The AS5C4008 is a 4 megabit monolithic CMOS SRAM,
organized as a 512K x 8.
The evolutionary 32 pin device allows for easy upgrades from
the 1 meg SRAM.
For flexibility in high-speed memory applications, ASI offers
chip enable (CE\) and output enable (OE\) capabilities. These
enhancements can place the outputs in High-Z for additional flexibil-
ity in system design.
Writing to these devices is accomplished when write enable (WE\)
and CE\ inputs are both LOW. Reading is accomplished when WE\
remains HIGH and CE\ and OE\ go LOW. This allows systems
designers to meet low standby power requirements.
All devices operate from a single +5V power supply and all
inputs are fully TTL-Compatible.
AS5C4008
Rev. 6.2 06/05
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
4 3 2
32 31 30
5
29
1
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
I/O6
I/O5
I/O4
I/O3
Vss
I/O2
I/O1
A12
A14
A16
A18
Vcc
A15
A17
NOTE:
Not all combinations of operating temperature, speed, data retention and
low power are necessarily available. Please contact factory for availability of specific part
number combinations.
32-Pin LCC (ECA)
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/O 7
For more products and information
please visit our web site at
www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1