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AS8NVLC512K32Q-45XT 参数 Datasheet PDF下载

AS8NVLC512K32Q-45XT图片预览
型号: AS8NVLC512K32Q-45XT
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×32模块的nvSRAM 3.3V高速SRAM与非易失性存储 [512K x 32 Module nvSRAM 3.3V High Speed SRAM with Non-Volatile Storage]
分类和应用: 存储静态存储器
文件页数/大小: 17 页 / 362 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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AUSTIN SEMICONDUCTOR, INC.
ADVANCE INFORMATION
Austin Semiconductor, Inc.
PIN ASSIGNMENT
(Top View)
68 Lead CQFP (Q)
VCAP
A0
A1
A2
A3
A4
A5
CS3\
GND
CS4\
WE1\
A6
A7
A8
A9
A10
Vcc
AS8nvLC512K32
nvSRAM
MILITARY PINOUT/BLOCK DIAGRAM
VCAP
1
CS
M4
M3
M2
M1
HSB
2
CS
Vcc
A11
A12
A13
A14
A15
A16
CS1\
OE\
CS2\
A17
WE2\
WE3\
WE4\
A18
NC
HSB\
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
CS
CS
Notes:
1. This pin left open if ordered with capacitors already mounted in
package.
2. HSB\ signal is wired to all 4 die in module. This can be left open if
not used.
Pin Name
A0 – A18
A0 – A17
DQ0 – DQ7
DQ0 – DQ15
DQ16 DQ23
DQ24 DQ31
WE\
1 4
CE\
1 4
OE\
V
SS
V
CC
I/O Type
Input
Description
Address Inputs Used to Select one of the 524,288 bytes of the nvSRAM for x8 Configuration.
Address Inputs Used to Select one of the 262,144 words of the nvSRAM for x16 Configuration.
Input/Output Bidirectional Data I/O Lines for die M1 (DQ0 7), M2 (DQ8 15), M3 (DQ16 23), M4 (DQ 24 31)
Write Enable Input, Active LOW. When selected LOW, data on the I/O pins is written to the specific
address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read cycles.
I/O pins are tri stated on deasserting OE HIGH.
Ground for the Device. Must be connected to the ground of the system.
Input
Input
Input
Ground
Power Supply Power Supply Inputs to the Device.
Hardware Store Busy (HSB\). When LOW this output indicates that a hardware store is in progress. When
pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull up resistor
Input/Output
keeps this pin HIGH if not connected (connection optional). After each store operation HSB\ is driven
HIGH for short time with standard output high current.
AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to
Power Supply
nonvolatile elements. (leave pin open if caps mounted on package)
No Connect No Connect. This pin is not connected to the die.
HSB\
V
CAP
NC
AS8nvLC512K32
Rev. 0.0 08/09
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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