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AS8S128K32PN-17/XT 参数 Datasheet PDF下载

AS8S128K32PN-17/XT图片预览
型号: AS8S128K32PN-17/XT
PDF下载: 下载PDF文件 查看货源
内容描述: 128K ×32的SRAM SRAM存储器阵列 [128K x 32 SRAM SRAM MEMORY ARRAY]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 12 页 / 243 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SRAM
Austin Semiconductor, Inc.
AS8S128K32
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55
°C≤TA≤125°C; Vcc = 5v ±10%)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip enable access time
Output hold from address change
Chip enable to output in Low-Z
Chip disable to output in High-Z
Chip enable to power-up time
Chip disable to power-down time
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
WRITE cycle time
Chip enable to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-z
Write enable to output in High-Z
-15
-17
-20
-25
-35
-45
SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
RC
AA
t
ACE
t
OH
t
LZCE
t
HZCE
t
PU
t
PD
t
AOE
t
LZOE
t
HZOE
t
t
t
t
15
15
15
2
2
7
0
15
6
0
6
15
12
12
0
1
12
12
8
1
2
1
1
17
17
17
2
2
8
0
17
7
0
7
17
12
12
0
1
12
12
9
1
2
7
1
1
20
20
20
2
2
9
0
20
7
0
7
20
15
15
0
1
15
15
10
1
2
9
10
25
25
25
2
2
10
0
25
8
0
9
25
17
17
0
1
17
17
12
1
2
11
35
35
35
2
2
14
0
35
12
0
12
35
20
20
0
1
20
20
15
1
2
14
45
45
45
2
2
15
0
45
12
0
12
45
22
22
0
1
20
20
15
1
2
15
ns
ns
ns
ns
ns
ns
4, 6, 7
4, 6, 7
4
4
4, 6
4, 6, 7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
CW
t
AW
t
AS
t
AH
t
t
WP1
WP2
t
DS
t
DH
t
LZWE
t
HZWE
4, 6, 7
4, 6, 7
NOTES:
1) For OE\ = HIGH condition. For OE\ = LOW condition
t
WP1 =
t
WP2 = 15 ns MIN.
AS8S128K32
Rev. 4.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4