欢迎访问ic37.com |
会员登录 免费注册
发布采购

MT5C2568 参数 Datasheet PDF下载

MT5C2568图片预览
型号: MT5C2568
PDF下载: 下载PDF文件 查看货源
内容描述: 32K ×8 SRAM SRAM存储器阵列 [32K x 8 SRAM SRAM MEMORY ARRAY]
分类和应用: 存储静态存储器
文件页数/大小: 16 页 / 141 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
 浏览型号MT5C2568的Datasheet PDF文件第2页浏览型号MT5C2568的Datasheet PDF文件第3页浏览型号MT5C2568的Datasheet PDF文件第4页浏览型号MT5C2568的Datasheet PDF文件第5页浏览型号MT5C2568的Datasheet PDF文件第6页浏览型号MT5C2568的Datasheet PDF文件第7页浏览型号MT5C2568的Datasheet PDF文件第8页浏览型号MT5C2568的Datasheet PDF文件第9页  
Austin Semiconductor, Inc.
32K x 8 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
•SMD 5962-88662
•SMD 5962-88552
•MIL-STD-883
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MT5C2568
AS5C2568
SRAM
PIN ASSIGNMENT
(Top View)
28-PIN SOJ (DCJ)
28-Pin DIP (C, CW)
V
CC
WE\
A13
A8
A9
A11
OE\
A10
CE\
DQ8
DQ7
DQ6
DQ5
DQ4
32-Pin LCC (ECW)
4 3 2 1 32 31 30
FEATURES
Access Times: 12, 15, 20, 25, 35, 45, 55, 70, & 100ns
Battery Backup: 2V data retention
Low power standby
High-performance, low-power CMOS double-metal process
Single +5V (+10%) Power Supply
Easy memory expansion with CE\
All inputs and outputs are TTL compatible
A6
A5
A4
A3
A2
A1
A0
NC
DQ1
5
6
7
8
9
10
11
12
13
A7
A12
A14
NC
V
CC
WE\
A13
29
28
27
26
25
24
23
22
21
A8
A9
A11
NC
OE\
A10
CE\
DQ8
DQ7
14 15 16 17 18 19 20
OPTIONS
Timing
12ns access
1
15ns access
1
20ns access
25ns access
35ns access
45ns access
55ns access
2
70ns access
2
100ns access
Package(s)
3
Ceramic DIP (300 mil)
Ceramic DIP (600 mil)
Ceramic LCC (28 leads)
Ceramic LCC (32 leads)
Ceramic Flat Pack
Ceramic SOJ
Operating Temperature Ranges
Military -55
o
C to +125
o
C
Industrial -40
o
C to +85
o
C
• 2V data retention/low power
MARKING
-12
-15
-20
-25
-35
-45
-55
-70
-100
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-Pin Flat Pack (F)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE\
A13
A8
A9
A11
OE\
A10
CE\
DQ8
DQ7
DQ6
DQ5
DQ4
3 2 1 28 27
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
4
5
6
7
8
9
10
11
12
A7
A12
A14
V
CC
WE\
26
25
24
23
22
21
20
19
18
DQ2
DQ3
V
SS
NC
DQ4
DQ5
DQ6
28-Pin LCC (EC)
A13
A8
A9
A11
OE\
A10
CE\
DQ8
DQ7
13 14 15 16 17
C
CW
EC
ECW
F
DCJ
No. 108
No. 110
No. 204
No. 208
No. 302
No. 500
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs
high-speed, low power CMOS designs using a four-transistor
memory cell. These SRAMs are fabricated using double-layer
metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Austin Semiconductor offers chip enable (CE\) and output
enable (OE\) capability. These enhancements can place the
outputs in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW. Reading is
accomplished when WE\ remains HIGH and CE\ and OE\ go
LOW. The device offers a reduced power standby mode when
disabled. This allows system designs to achieve low standby
power requirements.
The “L” version provides a battery backup/low
voltage data retention mode, offering 2mW maximum power
dissipation at 2 volts. All devices operate from a single +5V
power supply and all inputs and outputs are fully TTL
compatible.
XT
IT
L
NOTES:
1. -12 available in IT only.
2. Electrical characteristics identical to those provided for the
45ns access devices.
3. Plastic SOJ (DJ Package) is available on the AS5C2568 datasheet.
For more products and information
please visit our web site at
www.austinsemiconductor.com
MT5C2568 / AS5C2568
Rev. 4.5 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
DQ3
V
SS
DQ4
DQ5
DQ6