HCTL-2000
Quadrature Decoder/Counter Interface ICs
Data Sheet
HCTL-2000, HCTL-2016, HCTL-2020
Description
The HCTL-2000, 2016, 2020 are CMOS ICs that
perform the quadrature decoder, counter, and bus
interface function. The HCTL-20XX family is designed
to improve system performance in digital closed loop
motion control systems and digital data input systems.
It does this by shifting time intensive quadrature
decoder functions to a cost effective hardware solution.
The entire HCTL-20XX family consists of a 4x
quadrature decoder, a binary up/down state counter,
and an 8-bit bus interface.
Features
• Interfaces encoder to microprocessor
• 14 MHz clock operation
• Full 4X decode
• High noise immunity: Schmitt Trigger inputs digital noise
filter
• 12 or 16-bit binary up/down counter
• Latched outputs
• 8-Bit tristate interface
• 8, 12, or 16-bit operating modes
• Quadrature decoder output signals, up/down and count
• Cascade output signals, up/down and count
• Substantially reduced system software
Applications
• Interface quadrature incremental encoders to
microprocessors
• Interface digital potentiometers to digital data input buses
Note:
Avago Technologies encoders are not
recommended for use in safety critical applications.
Eg. ABS braking systems, power steering, life support
systems and critical care medical equipment. Please
contact sales representative if more clarification is
needed.
Devices
Part Number
HCTL-2000
HCTL-2016
HCTL-2020
Description
12-bit counter. 14 MHz clock operation.
All features of the HCTL-2000. 16-bit counter.
All features of the HCTL-2016. Quadrature decoder output
signals. Cascade output signals.
Package Drawing
A
A
B
ESD WARNING:
Standard CMOS handling precautions should be observed with the HCTL-20XX family ICs.
AVAGO [ AVAGO TECHNOLOGIES LIMITED ]
