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AL5DS9089V 参数 Datasheet PDF下载

AL5DS9089V图片预览
型号: AL5DS9089V
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V同步双端口SRAM 4K / 8K / 16K / 32K / 64K / 128K X 8/9 /16/ 18位 [3.3V Synchronous Dual-Port SRAM 4K/8K/16K/32K/64K/128K x 8/9/16/18-bit]
分类和应用: 静态存储器
文件页数/大小: 2 页 / 117 K
品牌: AVERLOGIC [ AVERLOGIC TECHNOLOGIES INC ]
 浏览型号AL5DS9089V的Datasheet PDF文件第2页  
AL5DS9xx9V
3.3V Synchronous Dual-Port SRAM
4K/8K/16K/32K/64K/128K x 8/9/16/18-bit
Features
True dual ported memory cells
17 Flow-Through/Pipelined devices:
-- 4K/8K/16K/32K/64K x 18-bit organization (AL5DS9349V/59V/69V/79V/89V)
-- 16K/32K/64K x 16-bit organization (AL5DS9269V/79V/89V)
-- 8K/16K/32K/64K/128K x 9-bit organization (AL5DS9159V/69V/79V/89V/99V)
-- 16K/32K/64K/128K x 8-bit organization (AL5DS9069V/79V/89V/99V)
Supports byte write/read for 16/18 bit devices
Separate upper-byte and lower-byte controls for bus matching (16/18 bit devices only)
3 modes supported:
-Pipelined
-Flow-Through
-Burst
Counter enable and reset
Fast (100-MHz) operation on both ports in Pipelined output mode
Supports depth and width expansion
0.25-micron CMOS for optimum speed / power
High speed clock to data access
3.3V low operating power
Pin-compatible and functionally equivalent to IDT or Cypress
Available in 100 or 128 pin TQFP
Architecture
AL5DS9xx9V Preliminary Rev: 1.0
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