E Ink Holdings Inc.
PD080SL5
11. Input signal timing:
DENB pin have high priority than SYNC mode(HSVC+VSYNC). When IC only use SYNC pin, DENB
pin have to connect to ground.
(A) Timing Specifications (DENB Mode):
Item
Symbol
Min.
604 X t3
14
600 X t3
920 X t5
24
Typ.
628X t3
16.58
600 X t3
Max.
800 X t3
20
600 X t3
Unit Remark
-
ms
-
Frame Cycling Period
Vertical Display Period
Horizontal Scanning Time
t1
t2
t3
1056 X t5
1064 X t5
-
26.4
33
μs
-
ns
ns
ns
ns
ns
Horizontal Display Period
Clock Cycle
Clock High Level Time
Clock Low Level Time
Hold time
t4
t5
t6
t7
t8
t9
800 X t5
20
800 X t5
25.0
800 X t5
31.25
9.0
9.0
4.0
5.0
-
-
-
-
-
-
-
-
Set-up time
(B) Timing Specifications (SYNC Mode)
Item
HSYNC Period
Symbol
Min.
24
920
800
12
12
42
214
10
0
14
604
600
2
0
1
Typ.
26.4
1056
800
128
86
42
214
-
Max.
33
Unit
us
tc
tc
tc
tc
tc
tc
ns
tc
ms
Hp
Hp
Hp
Hp
Hp
Hp
Remark
Hp
1064
800
202
202
42
214
Tc-10
200
20
800
600
27
25
1
Display period
Pulse width
Back-porch
Front-porch
Hpw+Hbp
Hdp
Hpw
Hbp
Hfp
Hsync-CLK
Vsync-Hsync
Hhc
Hvh
Vp
0
VSYNC Period
16.58
628
600
4
23
1
Note 1
(Frame cycling period)
Display period
Pulse width
Back-porch
Front-porch
Vdp
Vpw
Vbp
Vfp
Vpw+Vbp
27
27
27
Note 1: Frame cycling period is optimum in 16.58ms.(60HZ)
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