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AZ100ELT21DG 参数 Datasheet PDF下载

AZ100ELT21DG图片预览
型号: AZ100ELT21DG
PDF下载: 下载PDF文件 查看货源
内容描述: 差分PECL到CMOS / TTL转换器 [Differential PECL to CMOS/TTL Translator]
分类和应用: 转换器
文件页数/大小: 5 页 / 68 K
品牌: AZM [ ARIZONA MICROTEK, INC ]
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ARIZONA MICROTEK, INC.
AZ100ELT21
Differential PECL to CMOS/TTL Translator
FEATURES
PACKAGE AVAILABILITY
Green / RoHS Compliant /
Lead (Pb) Free Package Available
3.5ns Typical Propagation Delay
Differential PECL Inputs
CMOS/TTL Outputs
Flow Through Pinouts
Operating Range of 3.0V to 5.5V
Direct Replacement for
ON Semiconductor MC100ELT21
Use AZ100ELT21 for 10K
Applications
PACKAGE
SOIC 8
SOIC 8 Green /
RoHS Compliant /
Lead (Pb) Free
TSSOP 8
TSSOP 8 Green /
RoHS Compliant /
Lead (Pb) Free
1
2
PART NO.
AZ100ELT21D
MARKING
AZM100
ELT21
<Date Code>
AZM100G
ELT21
<Date Code>
AZH
T21
<Date Code>
AZHG
T21
<Date Code>
NOTES
1,2
AZ100ELT21DG
1,2
AZ100ELT21T
1,2
AZ100ELT21TG
1,2
DESCRIPTION
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
Date code format: “Y” for year followed by “WW” for week.
The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are
used, only V
CC
and ground are required. The small outline 8-lead packaging and the single gate of the ELT21 makes
it ideal for those applications where space, performance and low power are at a premium.
The ELT21 provides a V
BB
output for single-ended use or a DC bias reference for AC coupling to the device.
For single-ended input applications, the V
BB
reference should be connected to one side of the D0/D0 differential
¯¯
input pair. The input signal is then fed to the other D0/D0 input. The V
BB
pin should be used only as a bias for the
¯¯
ELT21 as its sink/source capability is limited. When used, the V
BB
pin should be bypassed to ground via a 0.01μF
capacitor.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
PIN DESCRIPTION
PIN
Q
D0, D0
¯¯
V
CC
V
BB
GND
NC
FUNCTION
CMOS/TTL Output
Differential Inputs
Positive Supply
Reference Voltage Output
Ground
No Connect
NC
1
CMOS/TTL
8
VCC
D0
2
PECL
7
Q
D0
3
6
NC
VBB 4
5
GND
1630 S. STAPLEY DR., SUITE 127
MESA, ARIZONA 85204
USA
(480) 962-5881
FAX (480) 890-2541
www.azmicrotek.com