ARIZONA MICROTEK, INC.
AZ100ELT23
Dual Differential PECL to CMOS/TTL Translator
PACKAGE AVAILABILITY
FEATURES
PACKAGE
•
•
•
•
•
•
•
•
•
Green / RoHS Compliant /
Lead (Pb) Free package available
3.5ns Typical Propagation Delay
<500ps Typical Output to Output Skew
Differential PECL Inputs
CMOS/TTL Outputs
Flow Through Pinouts
Direct Replacement for ON
Semiconductor MC100ELT23
Operating Range of 3.0V to 5.5V (For
operation down to 2.5V consult AZM)
Use AZ100ELT23 for 10K Applications
SOIC 8
SOIC 8 RoHS
Compliant / Lead
(Pb) Free
SOIC 8 Green /
RoHS Compliant /
Lead (Pb) Free
TSSOP 8
TSSOP 8 RoHS
Compliant / Lead
(Pb) Free
1
2
PART NUMBER
AZ100ELT23D
AZ100ELT23D+
MARKING
AZM100
ELT23
AZM100+
ELT23
AZM100G
ELT23
AZH
T23
AZH+
T23
NOTES
1,2
1,2
AZ100ELT23DG
AZ100ELT23T
AZ100ELT23T+
1,2,3
1,2
1,2
DESCRIPTION
3
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K
parts) Tape & Reel.
Date code format: “Y” or “YY” for year followed by “WW” for week on
underside of part.
The Green package mold compound is halogen free. The leads are plated
with 100% matte tin (Sn), eliminating lead (Pb). The Green package is
also RoHS compliant / Lead (Pb) Free.
The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels
are used, only V
CC
and ground are required. The small outline 8-lead packaging and the low skew, dual gate design
of the ELT23 makes it ideal for applications that require the translation of a clock and a data signal.
The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V
BB
reference, the ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no
specified difference between the differential input 10K and 100K standards. Therefore the AZ100ELT23 can accept
any standard differential PECL input referenced from a V
CC
of 3.0V to 5.5V.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
D0
PIN DESCRIPTION
PIN
Q0, Q1
DO, D0 – D1, D1
¯¯
¯¯
V
CC
GND
FUNCTION
CMOS/TTL Outputs
Differential PECL inputs
Positive Supply
Ground
1
8
VCC
D0
2
PECL
CMOS/TTL
7
Q0
D1
3
6
Q1
D1
4
5
GND
1630 S. STAPLEY DR., SUITE 127
•
MESA, ARIZONA 85204
•
USA
•
(480) 962-5881
•
FAX (480) 890-2541
www.azmicrotek.com