ARIZONA MICROTEK, INC.
AZ100EP16FE
ECL/PECL High Speed VCSEL Driver with
Variable Output Swing or Limiting Amplifier
FEATURES
•
•
•
•
Silicon-Germanium for High Speed
Operation
<100ps Typical Rise/Fall Times
Optimized for 0.622 to 2.5Gbps
Fiber Applications
S-Parameter (.s2p) and IBIS Model
Files available on Arizona Microtek
Website
PACKAGE
TSSOP 8
1
2
PACKAGE AVAILABILITY
PART NUMBER
AZ100EP16FET
MARKING
AZHP
16FE
NOTES
1,2
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape
& Reel.
Date code on underside of part. Format: “Y” or “YY” for year followed by “WW”
for week.
DESCRIPTION
The AZ100EP16FE is a Silicon–Germanium (SiGe) differential VCSEL driver with variable output swing or
limiting post amplifier. The 100EP16FE is optimized for OC-12, OC-24, OC-48, Ethernet, Sonnet, Fiber Channel or
related applications at data rates up to 2.5Gbps. An input controls the amplitude of the Q/Q outputs, which allows
¯
compensation for differing VCSEL characteristics.
The operational range of the 100EP16FE control input, V
CTRL
, is from V
REF
(full swing) to V
CC
(small swing).
For post amplifier applications, maximum swing is achieved by leaving the V
CTRL
pin open or by tying it to the
negative supply pin (V
EE
). Simple control of the output swing can be obtained by a variable resistor between the
V
REF
and V
CC
pins, with the wiper driving V
CTRL
. A typical application circuit is described in this Data Sheet.
The 100EP16FE also provides a V
REF
output which functions as a DC bias for input AC coupling to the device.
The V
REF
pin should be used only as a bias for the 100EP16FE as its current sink/source capability is limited. When
used, the V
REF
pin should be bypassed to ground via a 0.01μF capacitor.
The maximum DC output current should be kept below 16mA. Connecting each output (Q/Q) to V
EE
with a
¯
180Ω resistor is typically used. The load is then AC coupled from the output. DC and AC symmetrical loading of
the Q/Q outputs will provide the best output wave shape.
¯
Under open input conditions for D/D, the Q/Q outputs are not guaranteed.
¯
¯
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.
PIN DESCRIPTION
PIN
D, D
¯
V
CTRL
Q, Q
¯
V
REF
V
CC
V
EE
FUNCTION
Data Inputs
Output Swing Control
Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
V
CTRL
1
8
V
CC
D
2
7
Q
D
3
6
Q
V
REF
4
5
V
EE
TSSOP 8
1630 S. STAPLEY DR., SUITE 127
•
MESA, ARIZONA 85204
•
USA
•
(480) 962-5881
•
FAX (480) 890-2541
www.azmicrotek.com
AZM [ ARIZONA MICROTEK, INC ]
