ARIZONA MICROTEK, INC.
AZ10LVEL11
AZ100LVEL11
ECL/PECL 1:2 Differential Fanout Buffer
FEATURES
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PACKAGE
265ps Propagation Delay
5ps Skew Between Outputs
High Bandwidth Output Transitions
Internal Input Pulldown Resistors
Operating Range of 3.0V to 5.5V
Direct Replacement for ON Semi
MC100LVEL11, MC10EL11
& MC100EL11
Transistor Count = 51
SOIC 8
SOIC 8
SOIC 8 RoHS
Compliant / Lead
(Pb) Free
SOIC 8 RoHS
Compliant / Lead
(Pb) Free
TSSOP 8
TSSOP 8
TSSOP 8 RoHS
Compliant / Lead
(Pb) Free
PACKAGE AVAILABILITY
PART NUMBER
AZ10LVEL11D
AZ100LVEL11D
AZ10LVEL11D+
MARKING
AZM10
LVEL11
AZM100
LVEL11
AZM10+
LVEL11
AZM100+
LVEL11
AZT
LV11
AZH
LV11
AZH+
LV11
NOTES
1,2
1,2
1,2
AZ100LVEL11D+
AZ10LVEL11T
AZ100LVEL11T
AZ100LVEL11T+
1,2
1,2
1,2
1,2
DESCRIPTION
1
2
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
Date code “YWW” or “YYWW” on underside of part.
The AZ10/100LVEL11 is a differential 1:2 fanout gate. The device is functionally similar to the E111 device
but with higher performance capabilities. Having within-device skews and output transition times significantly
improved over the E111, the AZ10/100LVEL11 is ideally suited for those applications that require the ultimate in
AC performance.
The differential inputs of the AZ10/100LVEL11 employ clamping circuitry to maintain stability under open
input conditions. If the inputs are left open, the Q outputs will go LOW.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
PIN DESCRIPTION
PIN
D, D
¯
Q0, Q0, Q1, Q1
¯¯
¯¯
V
CC
V
EE
FUNCTION
Data Inputs
Data Outputs
Positive Supply
Negative Supply
Q0 1
8
V
CC
Q0 2
7
D
Q1 3
6
D
Q1 4
5
V
EE
1630 S. STAPLEY DR., SUITE 127
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MESA, ARIZONA 85204
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USA
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(480) 962-5881
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FAX (480) 890-2541
www.azmicrotek.com