AZ100LVEL16VV
Dual Frequency PECL/ECL Oscillator
Gain Stage & Buffer with Enable
D
ESCRIPTION
The
is a specialized oscillator gain stage with two
selectable data input pairs and a high gain output buffer including an
enable. Selectable data input pairs permit switching between two different
oscillator frequencies. The Q
HG
/Q
HG
outputs have a voltage gain several
¯
times greater than the Q/Q outputs. An enable allows continuous oscillator
¯
operation by only controlling the Q
HG
/Q
HG
outputs.
¯
The AZ100LVEL16VV also provides a reference voltage (V
BB
) with
internal biasing resistors to each input to minimize external components.
F
EATURES
•
Minimizes External
Components
•
High Bandwidth for
≥1GHz
•
Similar Operation as
except
with selectable data input
pairs
•
-147 dBc/Hz Typical Noise
Floor
B
LOCK
D
IAGRAM
A
PPLICATIONS
•
•
Dual frequency oscillators
Crystal or saw oscillators that
require minimal external
components.
P
ACKAGE
A
VAILABILITY
•
MLP16
o
Green/RoHS Compliant/Pb-Free
Order Number
AZ100LVEL16VRL
1
1
2
Package
MLP16
Marking
AZM+16K <Date Code>
2
- Add 'R1' at end of PN for 7in (1k parts), 'R2' (2.5k) for 13in
See www.azmicrotek.com for
1630 S Stapley Dr, Suite 127
Mesa, AZ 85204 USA
May 2012, Rev 2.0
+1-480-962-5881