AZ100LVEL32
PECL/ECL ÷2 Divider
D
ESCRIPTION
The
is an integrated
÷2
divider. The reset pin is
asynchronous and is asserted on the rising edge. Upon power-up, the
internal flip-flop will attain a random logic state; the reset allows for the
synchronization of multiple AZ100LVEL32’s in a system.
The AZ100LVEL32 is a direct replacement for the On Semiconductor
MC100EL/LVEL32
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F
EATURES
3.0+ GHz toggle frequency
470ps propagation delay
Internal input pulldown
resistors
3.0V to 5.5V power supply
B
LOCK
D
IAGRAM
A
PPLICATIONS
•
General Applications
P
ACKAGE
A
VAILABILITY
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MLP8
MSOP8
SOIC8
Green/RoHS Compliant/Pb-Free
Part Number (PN)
AZ100LVEL32NG
1
AZ100LVEL32TG
1
AZ100LVEL32DG
1
1
2
Package
MLP 8
MSOP 8
SOIC 8
Marking
C2G <Date Code>
2
AZHGLV32
2
AZM100GLVEL3
,2
- Add 'R1' at end of PN for 7in (1k parts), 'R2' (2.5k) for 13in
See www.azmicrotek.com for
+1-480-962-5881
1630 S Stapley Dr, Suite 127
Mesa, AZ 85204 USA
May 2012, Rev 2.0