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ADS1256IDBT 参数 Datasheet PDF下载

ADS1256IDBT图片预览
型号: ADS1256IDBT
PDF下载: 下载PDF文件 查看货源
内容描述: 极低噪声, 24位模拟数字转换器 [Very Low Noise, 24-Bit Analog-to-Digital Converter]
分类和应用: 转换器
文件页数/大小: 39 页 / 422 K
品牌: BURR-BROWN [ BURR-BROWN CORPORATION ]
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ADS1255
ADS1256
www.ti.com
SBAS288D − JUNE 2003 − REVISED AUGUST 2004
t
13
SCLK
t
12
t
14
t
15
t
13
Figure 2. SCLK Reset Timing
TIMING CHARACTERISTICS FOR FIGURE 2
SYMBOL
t12
t13
t14
t15
DESCRIPTION
SCLK reset pattern, first high pulse
SCLK reset pattern, low pulse
SCLK reset pattern, second high pulse
SCLK reset pattern, third high pulse
MIN
300
5
550
1050
750
1250
MAX
500
UNIT
τ
CLKIN(1)
τ
CLKIN
τ
CLKIN
τ
CLKIN
(1)
τ
CLKIN = master clock period = 1/fCLKIN.
t
16
RESET, SYNC/PDWN
Figure 3. RESET and SYNC/PDWN Timing
TIMING CHARACTERISTICS FOR FIGURE 3
SYMBOL
t16
DESCRIPTION
RESET, SYNC/PDWN, pulse width
MIN
4
MAX
UNIT
τ
CLKIN(1)
(1)
τ
CLKIN = master clock period = 1/fCLKIN.
t
17
DRDY
Figure 4. DRDY Update Timing
TIMING CHARACTERISTICS FOR FIGURE 4
SYMBOL
t17
DESCRIPTION
Conversion data invalid while being updated (DRDY shown with no data retrieval)
MIN
16
MAX
UNIT
τ
CLKIN(1)
(1)
τ
CLKIN = master clock period = 1/fCLKIN.
7