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ADS805E 参数 Datasheet PDF下载

ADS805E图片预览
型号: ADS805E
PDF下载: 下载PDF文件 查看货源
内容描述: 12位, 20MHz的采样模拟数字转换器 [12-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器光电二极管
文件页数/大小: 12 页 / 262 K
品牌: BURR-BROWN [ BURR-BROWN CORPORATION ]
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®
ADS
805
U
ADS805
ADS
805
E
12-Bit, 20MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
TM
FEATURES
q
HIGH SFDR: 74dB at 9.8MHz f
IN
q
HIGH SNR: 68dB
q
LOW POWER: 300mW
q
LOW DLE: 0.25LSB
q
SMALL 28-LEAD SSOP AND SOIC
PACKAGES
q
FLEXIBLE INPUT RANGE
q
OVER-RANGE INDICATOR
APPLICATIONS
q
STUDIO CAMERAS
q
IF AND BASEBAND DIGITIZATION
q
COPIERS
q
TEST INSTRUMENTATION
DESCRIPTION
The ADS805 is a 20MHz, high dynamic range, 12-bit pipelined
analog-to-digital converter. This converter includes a high-band-
width track/hold that gives excellent spurious performance up to
and beyond the Nyquist rate. This high-bandwidth, linear track/hold
minimizes harmonics and has low jitter, leading to excellent SNR
performance. The ADS805 is also pin-compatible with the 10MHz
ADS804 and the 5MHz ADS803.
The ADS805 provides an internal reference or an external reference
can be used. ADS805 can be programmed for a 2Vp-p input range
which is the easiest to drive with a single op amp and provides the
best spurious performance. Alternatively, the 5Vp-p input range can
be used for the lowest input-referred noise of 0.09 LSBs rms giving
+V
S
superior imaging performance. There is also the capability to set the
input range between 2Vp-p and 5Vp-p, either single-ended or
differential. The ADS805 also provides an overrange flag that
indicates when the input signal has exceeded the converter’s full
scale range. This flag can also be used to reduce the gain of the front
end signal conditioning circuitry.
The ADS805 employs digital error techniques to provide excellent
differential linearity for demanding imaging applications. Its low
distortion and high SNR give the extra margin needed for commu-
nications, medical imaging, video and test instrumentation applica-
tions. The ADS805 is available in 28-lead SSOP and SOIC pack-
ages.
CLK
VDRV
ADS805
Timing Circuitry
V
IN
IN
T/H
IN
12-Bit
Pipelined
A/D Core
Error
Correction
Logic
3-State
Outputs
D0
D11
CM
Reference Ladder
and Driver
Reference and
Mode Select
OVR
REFT
V
REF
SEL
REFB
OE
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©
1997 Burr-Brown Corporation
PDS-1397C
Printed in U.S.A. October, 1998