®
DAC811
For most current data sheet and other product
information, visit www.burr-brown.com
Microprocessor-Compatible
12-BIT DIGITAL-TO-ANALOG CONVERTER
FEATURES
q
SINGLE INTEGRATED CIRCUIT CHIP
q
MICROCOMPUTER INTERFACE:
DOUBLE-BUFFERED LATCH
q
VOLTAGE OUTPUT:
±
10V,
±
5V, +10V
q
MONOTONICITY GUARANTEED OVER
TEMPERATURE
q
±
1/2LSB MAXIMUM NONLINEARITY OVER
TEMPERATURE
q
GUARANTEED SPECIFICATIONS AT
±
12V
AND
±
15V SUPPLIES
q
TTL/5V CMOS-COMPATIBLE LOGIC
INPUTS
Input gating logic is designed so that loading the last
nibble or byte of data can be accomplished simulta-
neously with the transfer of data (previously stored in
adjacent latches) from adjacent input latches to the
D/A latch. This feature avoids spurious analog output
values while using an interface technique that saves
computer instructions.
The DAC811 is laser trimmed at the wafer level and
is specified to
±1/4LSB
maximum linearity error (B,
K, and S grades) at 25°C and
±1/2LSB
maximum over
the temperature range. All grades are guaranteed mono-
tonic over the specification temperature range.
The DAC811 is available in six performance grades
and three package types. DAC811J and K are speci-
fied over the temperature ranges of 0°C to +70°C;
DAC811A and B are specified over –25°C to +85°C;
DAC811R and S are specified over –55°C to +125°C.
DAC811J and K are packaged in a reliable 28-pin
plastic DIP or plastic SOIC package, while DAC811A,
B, R and S are available in a 28-pin 0.6" wide dual-
inline hermetically sealed ceramic side-brazed pack-
age (H package).
DESCRIPTION
The DAC811 is a complete, single-chip integrated-
circuit, microprocessor-compatible, 12-bit digital-to-
analog converter. The chip combines a precision volt-
age reference, microcomputer interface logic, and
double-buffered latch, in a 12-bit D/A converter with
a voltage output amplifier. Fast current switches and a
laser-trimmed thin-film resistor network provide a
highly accurate and fast D/A converter.
Microcomputer interfacing is facilitated by a double-
buffered latch. The input latch is divided into three
4-bit nibbles to permit interfacing to 4-, 8-, 12-, or
16-bit buses and to handle right-or left-justified data.
The 12-bit data in the input latches is transferred to the
D/A latch to hold the output value.
4 MSBs
4 LSBs
S
J
Input Latch
Input Latch
Input Latch
R
F
10V
D/A Latch
R
F
V
OUT
BPO
12-Bit D/A Converter
R
BPO
Voltage Reference
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
© 1983 Burr-Brown Corporation
PDS-503K
1
Printed in U.S.A. January, 2000
DAC811
BURR-BROWN [ BURR-BROWN CORPORATION ]
