APPLICATION INFORMATION
THEORY OF OPERATION
The architecture of the DAC900 uses the current steering
technique to enable fast switching and a high update rate.
The core element within the monolithic D/A converter is an
array of segmented current sources, which are designed to
deliver a full-scale output current of up to 20mA (see
Figure 1). An internal decoder addresses the differential
current switches each time the DAC is updated and a
corresponding output current is formed by steering all
currents to either output summing node, I
OUT
or I
OUT
.
The complementary outputs deliver a differential output
signal, which improves the dynamic performance through
reduction of even-order harmonics, common-mode signals
(noise), and double the peak-to-peak output signal swing by
a factor of two, compared to single-ended operation.
The segmented architecture results in a significant reduc-
tion of the glitch energy, and improves the dynamic perfor-
mance (SFDR) and DNL. The current outputs maintain a
very high output impedance of greater than 200kΩ.
The full-scale output current is determined by the ratio of
the internal reference voltage (1.24V) and an external
resistor, R
SET
. The resulting I
REF
is internally multiplied by
a factor of 32 to produce an effective DAC output current
that can range from 2mA to 20mA, depending on the value
of R
SET
.
The DAC900 is split into a digital and an analog portion,
each of which is powered through its own supply pin. The
digital section includes edge-triggered input latches and the
decoder logic, while the analog section comprises the cur-
rent source array with its associated switches and the
reference circuitry.
+3V to +5V
Analog
0.1µF
Bandwidth
Control
DAC900
Full-Scale
Adjust
Resistor
+V
A
BW
+V
D
+3V to +5V
Digital
DAC TRANSFER FUNCTION
The total output current, I
OUTFS
, of the DAC900 is the
summation of the two complementary output currents:
I
OUTFS
= I
OUT
+ I
OUT
(1)
The individual output currents depend on the DAC code and
can be expressed as:
I
OUT
= I
OUTFS
• (Code/1024)
I
OUT
= I
OUTFS
• (1023 - Code/1024)
(2)
(3)
where ‘Code’ is the decimal representation of the DAC data
input word. Additionally, I
OUTFS
is a function of the refer-
ence current I
REF
, which is determined by the reference
voltage and the external setting resistor, R
SET
.
I
OUTFS
= 32 • I
REF
= 32 • V
REF
/R
SET
(4)
In most cases the complementary outputs will drive resistive
loads or a terminated transformer. A signal voltage will
develop at each output according to:
V
OUT
= I
OUT
• R
LOAD
V
OUT
= I
OUT
• R
LOAD
(5)
(6)
I
OUT
FSA
Ref
Input REF
IN
0.1µF
INT/EXT
Ref
Buffer
Ref
Control
Amp
PMOS
Current
Source
Array
LSB
Switches
Segmented
MSB
Switches
BYP
I
OUT
1:1
V
OUT
R
SET
2kΩ
400pF
50Ω
0.1µF
20pF
50Ω
20pF
Latches and Switch
Decoder Logic
PD
Power Down
(internal pull-down)
+1.24V Ref
AGND
Analog
Ground
CLK
Clock
Input
10-Bit Data Input
D9...D0
DGND
Digital
Ground
NOTE: Supply bypassing not shown.
FIGURE 1. Functional Block Diagram of the DAC900.
®
11
DAC900
BURR-BROWN [ BURR-BROWN CORPORATION ]
