SPECIFICATIONS
At T
A
= full specified temperature range, +V
A
= +5V, +V
D
= +5V, differential transformer coupled output, 50Ω doubly terminated, unless otherwise specified.
DAC900U/E
PARAMETER
Resolution
Output Update Rate (f
CLOCK
)
Output Update Rate
Full Specified Temperature Range, Operating
STATIC
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
DYNAMIC PERFORMANCE
Spurious Free Dynamic Range (SFDR)
f
OUT
= 1.0MHz, f
CLOCK
= 25MSPS
f
OUT
= 2.1MHz, f
CLOCK
= 50MSPS
f
OUT
= 5.04MHz, f
CLOCK
= 50MSPS
f
OUT
= 5.04MHz, f
CLOCK
= 100MSPS
f
OUT
= 20.2MHz, f
CLOCK
= 100MSPS
f
OUT
= 25.3MHz, f
CLOCK
= 125MSPS
f
OUT
= 41.5MHz, f
CLOCK
= 125MSPS
f
OUT
= 27.4MHz, f
CLOCK
= 165MSPS
f
OUT
= 54.8MHz, f
CLOCK
= 165MSPS
Spurious Free Dynamic Range within a Window
f
OUT
= 5.04MHz, f
CLOCK
= 50MSPS
f
OUT
= 5.04MHz, f
CLOCK
= 100MSPS
Total Harmonic Distortion (THD)
f
OUT
= 2.1MHz, f
CLOCK
= 50MSPS
f
OUT
= 2.1MHz, f
CLOCK
= 125MSPS
Two Tone
f
OUT1
= 13.5MHz, f
OUT2
= 14.5MHz, f
CLOCK
= 100MSPS
Output Settling Time
(2)
Output Rise Time
(2)
Output Fall Time
(2)
Glitch Impulse
DC-ACCURACY
Full-Scale Output Range
(3)
(FSR)
Output Compliance Range
Gain Error
Gain Error
Gain Drift
Offset Error
Offset Drift
Power Supply Rejection, +V
A
Power Supply Rejection, +V
D
Output Noise
Output Resistance
Output Capacitance
REFERENCE
Reference Voltage
Reference Tolerance
Reference Voltage Drift
Reference Output Current
Reference Input Resistance
Reference Input Compliance Range
Reference Small Signal Bandwidth
(4)
DIGITAL INPUTS
Logic Coding
Latch Command
Logic High Voltage, V
IH
Logic Low Voltage, V
IL
Logic High Voltage, V
IH
Logic Low Voltage, V
IL
Logic High Current
,
I
IH(5)
Logic Low Current, I
IL
Input Capacitance
ACCURACY
(1)
CONDITIONS
MIN
TYP
10
200
165
+85
±0.3
±0.5
+0.5
+1.0
MAX
UNITS
Bits
MSPS
MSPS
°C
LSB
LSB
4.5V to 5.5V
2.7V to 3.3V
Ambient, T
A
T
A
= +25°C
f
CLOCK
= 25MSPS, f
OUT
= 1.0MHz
T
A
= +25°C
To Nyquist
165
125
–40
–0.5
–1.0
70
76
75
68
68
62
62
53
59
53
78
78
–74
–73
60
30
2
2
3
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
ns
ns
ns
pV-s
20.0
+1.25
+10
+10
+0.025
mA
V
%FSR
%FSR
ppmFSR/°C
%FSR
ppmFSR/°C
%FSR/V
%FSR/V
pA/√Hz
kΩ
pF
V
%
ppmFSR/°C
µA
MΩ
V
MHz
2MHz Span
4MHz Span
to 0.1%
10% to 90%
10% to 90%
All Bits High, I
OUT
With Internal Reference
With External Reference
With Internal Reference
With Internal Reference
With Internal Reference
2.0
–1.0
–10
–10
–0.025
±1
±2
±120
±0.1
–0.2
–0.025
I
OUT
= 20mA, R
LOAD
= 50Ω
I
OUT
, I
OUT
to Ground
50
200
12
+1.24
±10
±50
10
1
0.1
1.3
Straight Binary
Rising Edge of Clock
5
0
3
0
±20
±20
5
+0.2
+0.025
1.25
+V
D
+V
D
+V
D
+V
D
+V
D
+V
D
=
=
=
=
=
=
+5V
+5V
+3V
+3V
+5V
+5V
3.5
2
1.2
0.8
V
V
V
V
µA
µA
pF
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
DAC900
2
BURR-BROWN [ BURR-BROWN CORPORATION ]
