ABSOLUTE MAXIMUM RATINGS(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Supply Input Voltage, VIN .......................................................–0.3V to 16V
Enable Input Voltage, VEN ....................................................... –0.3V to VIN
Feedback Voltage, VFB ........................................................ –0.3V to 6.0V
NR Pin Voltage, VNR .............................................................–0.3V to 6.0V
Output Short-Circuit Duration ...................................................... Indefinite
Operating Temperature Range ....................................... –55°C to +125°C
Storage Temperature Range .......................................... –65°C to +150°C
Junction Temperature ..................................................... –55°C to +150°C
Lead Temperature (soldering, 3s, SOT, and DDPAK) ................... +240°C
ESD Rating: HBM (VOUT to GND) ..................................................... 1.5kV
HBM (All other pins) ........................................................ 2kV
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
CDM .............................................................................. 500V
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
VOUT
REG104xx-yyyy/zzz
XX is package designator.
YYYY is typical output voltage (5 = 5.0V, 2.85 = 2.85V, A = Adjustable).
ZZZ is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
PIN CONFIGURATIONS
Top View
SOT223-5
DDPAK-5
Tab is Gnd
Tab is Gnd
1
2 3 4
5
1
2
3
4
5
VO
NR/Adjust(1)
Gnd
VIN
Enable
VIN
Gnd
NR/Adjust(1)
Enable
VOUT
(DCQ Package)
(KTT Package)
NOTE: (1) For REG104A-A: voltage setting resistor pin.
All other models: noise reduction capacitor pin.
REG104
2
SBVS025G