Preliminary Datasheet
1.5A DDR TERMINATION REGULATOR
General Description
The AP2301 linear regulator is designed to meet the
JEDEC specification SSTL-2 and SSTL-18 for termi-
nation of DDR-SDRAM. The regulator can sink or
source up to 1.5A current continuously, offers enough
current for most DDR applications. Output voltage is
designed to track the reference voltage within a 2%
tolerance for load regulation while preventing shooting
through on the output stage. On-chip thermal limiting
provides protection against a combination of high cur-
rent and ambient temperature which would create an
excessive junction temperature.
The AP2301, used in conjunction with series termina-
tion resistors, provides an excellent voltage source for
active termination schemes of high speed transmission
lines as those seen in high speed memory buses and
distributed backplane designs.
The AP2301 is available in SOIC-8 and TO-252-5L
packages.
AP2301
Features
·
·
·
·
·
Support Both DDR I (1.25V
TT
) and DDR II
(0.9V
TT
) Requirements
Source and Sink Current up to 1.5A
High Accuracy Output Voltage at Full-load
Adjustable V
OUT
by External Resistors
Shutdown for Standby or Suspend Mode
Operation with High-impedance Output
Applications
·
·
·
DDR-SDRAM Termination
DDR-II Termination
SSTL-2 Termination
SOIC-8
TO-252-5L
Figure 1. Package Types of AP2301
Jul. 2006 Rev. 1. 3
1
BCD Semiconductor Manufacturing Limited