BCM1250
PRODUCT
®
Brief
O F
B E N E F I T S
BCM1250 HIGH-PERFORMANCE, INTEGRATED 64-BIT MULTIPROCESSOR
B C M 1 2 5 0
600 MHz–1 GHz
F E AT U R E S
S U M M A R Y
•
Two 64-bit MIPS CPUs, scalable from
• Quad-issue in order pipeline; dual execute, dual memory pipes
• Enhanced skew pipeline enables zero load-to-use penalty
• 32-KB instruction cache, 32-KB data cache
• Advanced branch predictors
• Connects the CPUs, L2 cache, memory controller and I/O bridges
• Runs at half the CPU core frequency; 256 bits wide
• 512 KB, shared by both CPUs
• 4-way associative, ECC protected
• Ways can be removed to provide fast on-chip RAM
• Two channels, each with a 64-bit data bus plus optional ECC
• Runs up to 200 MHz clock rate, 400 MHz data rate
• Support for DDR SDRAM, SGRAM, and FCRAM
• Three 10/100/1000 Ethernet MACs; 802.3 compliant
• Option to configure MACs into packet FIFOs
• Up to two packet FIFOs each capable of OC-48 data rates
• 32 bits, 33/66 MHz (PCI 2.2)
• Host bridge or target device
TM
•
Industry-leading performance
•
Fast, on-chip multiprocessor bus
•
On-chip L2 cache
•
Low power dissipation of 8–10W (@ 800 MHz)
•
High functional integration
Programming
•
Instruction Setease and flexibility based on MIPS64
Architecture (ISA)
•
Scalable multiprocessor chip and system architecture
•
Broad tools and system software support
For additional information on
•
evaluation boards, refer to the the BCM1250and
BCM91250A
BCM91250E product briefs
*Based on internal Broadcom benchmark, using BCM1250 for
standard IPv4 L3 look-up/switching.
• Processing speed of up to 10 Mpps*
• 128 Gbps on-chip bus bandwidth; 50 Gbps memory
bandwidth, 30 Gbps total I/O bandwidth
•
DDR memory controller
TA R G E T
A P P L I C AT I O N S
•
High-speed packet interfaces
•
PCI interface
Due to the BCM1250's world-class performance, power
efficiency and integration, the processor is ideal for a
broad variety of applications including:
• Enterprise workgroup and backbone switches
• VPN switches/routers
• Multiservice access concentrators
• SAN routers/gateway/switches
• IP services/subscriber management platforms
• Web-server switches
• High-end firewall/intrusion detection devices
• Wireless basestations
•
HyperTransport
(formerly LDT) I/O interface
•
Integrated system I/O
• Complies with HyperTransport
TM
standard for high-speed I/O
fabric
• 500-MHz clock rate, double data rate, for 600 MHz CPUs;
600-MHz clock rate for 800 MHz CPUs
• Peak bandwidth of 9.6 Gbps in each direction @ 600 MHz
• Supports double-ended fabrics (to link two BCM1250s)
• Generic I/O for direct connect to boot ROM, flash
• Two SMBus serial configuration interfaces
• PCMCIA control interface
• Two serial interfaces
Example: Packet Processing Blade
BCM5840
2,400 Mbps
IPSec
BCM5615
24-10/100
+2-Gigabit
Ports
PCI
SMII
24
10/100
Ports
BCM5238
BCM5238
FPGA
HyperTransport
•
Extensive, on-chip debug features
•
8–10W power dissipation @ 800 MHz
•
Support for leading operating systems including
VxWorks , Linux and NetBSD
•
Evaluation board platform available with tools,
®
®
BCM5238
SGMII
4
10/100
/1000
Ports
GMII
BCM5404
BCM5680
8-Port
10/100/1000
BASE-T
Aggregation,
L2/L3 Switching
BCM
1250
BCM
1250
DDR
DRAM
GMII
DDR
DRAM
firmware and software drivers
Deep Packet
Look-up,
L4-L7 Processing
BOARDCOM [ Broadcom Corporation. ]
