BCM5701
®
10/100/1000BASE-T CONTROLLER WITH INTEGRATED TRANSCEIVER
FEATURES
SUMMARY OF BENEFITS
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Single-chip solution for LAN on Motherboard (LOM) and
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388-pin PBGA package
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3.3V I/Os (5V tolerant)
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JTAG
network interface card (NIC) applications
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Integrated
10BASE-T/100BASE-TX/1000BASE-T
transceivers
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10/100/1000-Mbps triple-speed media access controller
(MAC)
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Host interfaces
- PCI v2.2, 32/64-bit, 33/66 MHz
- PCI-X v1.0 64-bit, 133 MHz
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Ultra-deep, 96-KB, on-chip packet buffer
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Dual, high-speed RISC cores with 16-KB caches
- Programmable inline packet classification
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SMBus controller
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On-chip power circuit controller and Wake on LAN power
switching circuit
Performance features
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TCP, IP, UDP checksum
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TCP segmentation
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CPU task offload
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Adaptive interrupts
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Ultra-deep, 96-KB packet buffer
Robust manageability
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PXE 2.0 remote boot
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Alert Standard Format (ASF 1.0 support)
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Statistics gathering (SNMP MIB II, Ethernet-like MIB,
Ethernet MIB [802.3x, clause 30])
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Comprehensive diagnostic and configuration software suite
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ACPI 1.1a compliant (multiple power modes)
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Wake on LAN
Advanced network features
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Priority queuing (802.1p layer 2 priority encoding; support for
four priority queues)
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Virtual LANs (802.1q VLAN tagging; support for up to 64
VLANs)
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Jumbo frames (9 KB)
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802.3x flow control
Advanced server features
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Link aggregation (802.3ad, GEC/FEC, Smart Load
Balancing™ [supports heterogeneous teams])
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Heterogeneous, mixed-speed failover
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Hot-Plug PCI support
Low power design—3.3 V/1.8 V, 0.18-µm CMOS
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Industry’s first 10/100/1000 MAC/PHY solution (power and
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space optimized for LOM and low-profile NIC applications)
Completely backward compatible:
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To existing 10/100 network infrastructure
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To existing PCI-based desktop and server platforms
Futureproof
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PCI-X interface, on-chip programmable CPUs, ASF support
Performance focused (optimized for throughput and CPU
utilization)
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Adaptive interrupts
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PCI-X eliminates PCI bottlenecks
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Ultra-deep, 96-KB packet buffer lowers CPU utilization and
averts PCI congestion
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CPU task offloads
Robust and highly manageable
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PXE 2.0, ACPI 1.1, Wake on LAN, ASF 1.0
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Integrated cable testing (link quality, length, pair skew, pair
polarity, pair swap)
Advanced features
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VLAN, priority queuing, jumbo frames
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RISC processors for advanced packet classification
Server-class reliability, availability, and performance features
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Link aggregation and load balancing
- Switch-dependent
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802.3ad (LACP), generic trunking (GEC/FEC)
- Switch and NIC independent
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Smart Load Balancing™ (unique technology that supports
heterogeneous teams, and can operate with any switch)
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Failover
- Smart Load Balancing allows heterogeneous failover
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Hot-Plug PCI support
Low power for zero airflow implementations
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0.18-µm CMOS design
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Advanced power management
Space savings for LOM
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300-pin HBGA package
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No external memory
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Integrated power circuitry
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