BCM5708S
®
SINGLE-PORT 1000/2500BASE-X ETHERNET CONTROLLER WITH
INTEGRATED TCP OFFLOAD ENGINE, RDMA, iSCSI WITH PCI EXPRESS
®
FEATURES
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Single-chip solution for LAN-on Motherboard (LOM) and
Network Interface Card (NIC) applications
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Integrated 1000/2500BASE-X SerDes
- SGMII support
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Host interfaces
- PCI Express
®
x4 Host interface
- Auto-negotiation between 1G and 2.5G modes
TCP offload engine
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Full fast-path TCP offload
iSCSI controller
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iSCSI initiator
RDMA controller (RNIC)
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RDMA over TCP (iWARP)—RDMAC 1.0 compliant
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Hardware-based data placement in application buffers without
CPU intervention (for User and Kernel modes)
Other performance features
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Receive Side Scaling (RSS)
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TCP, IP checksum
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TCP segmentation
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Adaptive interrupts
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Message Signal Interrupt (MSI) support
Robust manageability
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Universal Management Port (UMP)
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PXE 2.0 remote boot
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Wake-On LAN
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IPMI pass-through feature
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Statistics gathering (SNMP MIB II, Ethernet-like MIB,
Ethernet MIB (802.3x, clause 30))
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Comprehensive diagnostic and configuration software suite
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ACPI 1.1a compliant power management
Advanced network features
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Virtual LANs—802.1q VLAN tagging
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Jumbo frames (9 KB)
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802.3x flow control
Low-power CMOS design
On-chip power circuit controller
400-ball 21 mm x 21 mm FBGA package
3.3V I/Os
JTAG
SUMMARY OF BENEFITS
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Industry’s first 1000/2500 SerDes-based TOE solution—power
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and space optimized for server blade and low-profile NIC
applications
Extremely low CPU utilization for TCP/IP applications
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Host CPU is free to run application code.
Accelerated IP-based storage
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Lower CPU utilization for file-level storage protocols such as
CIFS and NFS
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iSCSI functionality with low CPU utilization
RDMA support for data placement in application buffers
reduces CPU utilization and lowers data transit latencies.
Future-proof
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Flexible implementation for TCP, iWARP, and iSCSI can
accommodate specification changes and interoperability
issues.
Performance-focused – optimized for throughput and CPU
utilization
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Adaptive interrupts
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2.5 Gigabit Ethernet
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RSS reduces CPU utilization on multi-CPU systems.
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MSI allows interrupt distribution in a multi-CPU host system.
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PCI Express host interface allows a low-latency access to CPU
and memory resources.
Robust and highly manageable
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UMP enables high bandwidth out-of-band system management
functionality over shared infrastructure.
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PXE 2.0, ACPI 1.1, Wake-On LAN
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IPMI pass-through capability allows on-board management
controllers access to the network in OS-present and OS-absent
states.
Server class reliability, availability, and performance features
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Link aggregation and load balancing
- Switch-dependent
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802.3ad (LACP), generic trunking (GEC/FEC)
- Switch and NIC independent
Low power for zero airflow implementations
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Advanced power management
Minimal real estate—ideal for LOM
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On-chip power circuit controller
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BOARDCOM [ Broadcom Corporation. ]
