BCM8212
®
TRANSCEIVER WITH INTERNAL LOOP TIMING AND PHASE DETECTOR
FEATURES
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2.488-Gbps SONET/SDH transceiver with dual differential
serial I/O
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Fully integrated CDR, MUX, DEMUX, and CMU with 16-bit,
155.52-MHz LVPECL interface
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On-chip, PLL-based clock generator
SUMMARY OF BENEFITS
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Low power consumption eliminates external heat sinks, fans
for system airflow, and expensive high current power supplies.
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Supports SONET dual-fiber ring architecture.8212-PB05-R
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High integration reduces design cycle and time to market.
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Internal phase detector and charge pump for cleanup PLL
Line and system loopback modes
Loss-of-signal output (LOSB) and input (LOSIB)
TX and RX lock detect
Elastic buffering with FIFO overflow alarm
Selectable 77.76/155.52-MHz reference clock
Selectable RX clock and RX data squelch on LOS
Selectable loop timing mode
Dual 2.5V/3.3V supplies
Power dissipation: 1.2W typical
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Provides increased port density per board and system.
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Features low jitter: 3 mUI
RMS
typical.
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CMOS-based device uses the most effective silicon economy of
scale.
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Exceeds SONET jitter requirements, which allows the use of
low-cost optics.
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Target applications:
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OC-48/STM-16 transmission equipment
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SONET/SDH optical modules
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ADD/DROP multiplexers
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Digital cross-connects
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ATM switch backboneONET/SDH test equipment
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SONET/SDH test equipment
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Terabit and edge routers
Selectable divide-by-32 or divide-by-16 receiver/ transmitter
low-speed parallel output clock
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Standard CMOS fabrication process
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23 ¥ 23 mm, 208-pin BGA package
Application Block Diagram
16
16
Network Interface
Processor
BCM8212
155.52 Mbps
2.488 Gbps
BCM8212
OTX
ORX
155.52 Mbps
ORX
OTX
16
16
Network Interface
Processor