BSI
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
BS62LV1027
KEY TO SWITCHING WAVEFORMS
Vcc / 0V
1V/ns
0.5Vcc
C
L
= 30pF+1TTL
C
L
= 100pF+1TTL
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Output Load
,
AC ELECTRICAL CHARACTERISTICS
( TA = -40
o
C to + 85
o
C )
READ CYCLE
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output Low Z
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
Data Hold from Address Change
(CE1)
(CE2)
(CE1)
(CE2)
(CE1)
(CE2)
CYCLE TIME : 55ns
(Vcc = 3.0~5.5V)
MIN. TYP. MAX.
CYCLE TIME : 70ns
(Vcc = 2.7~5.5V)
MIN. TYP. MAX.
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
AVAX
t
AVQV
t
E1LQV
t
E2HOV
t
GLQV
t
E1LQX
t
E2HOX
t
GLQX
t
E1HQZ
t
E2HQZ
t
GHQZ
t
AXOX
t
RC
t
AA
t
ACS1
t
ACS2
t
OE
t
CLZ1
t
CLZ2
t
OLZ
t
CHZ1
t
CHZ2
t
OHZ
t
OH
55
--
--
--
--
10
10
10
--
--
--
10
--
--
--
--
--
--
--
--
--
--
--
--
--
55
55
55
30
--
--
--
35
35
30
--
70
--
--
--
--
10
10
10
--
--
--
10
--
--
--
--
--
--
--
--
--
--
--
--
--
70
70
70
40
--
--
--
40
40
35
--
R0201-BS62LV1027
4
Revision 2.1
Jan.
2004
BSI [ BRILLIANCE SEMICONDUCTOR ]
