Data Sheet
Electrical Characteristics - CDK2308A
(AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 20MSPS clock, 50% clock duty cycle,
-1dBFS 8MHz input signal, 13-bit output, unless otherwise noted)
Symbol
Performance
Parameter
Conditions
F
IN
= 2MHz
Min
Typ
61.7
Max
Units
CDK2308
Dual, 20/40/65/80MSPS, 10-bit Analog-to-Digital Converters
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
bits
bits
bits
bits
dBc
SNR
Signal to Noise Ratio
F
IN
= 8MHz
F
IN
≃
FS/2
F
IN
= 20MHz
F
IN
= 2MHz
F
IN
= 8MHz
F
IN
≃
FS/2
F
IN
= 20MHz
F
IN
= 2MHz
F
IN
= 8MHz
F
IN
≃
FS/2
F
IN
= 20MHz
F
IN
= 2MHz
F
IN
= 8MHz
F
IN
≃
FS/2
F
IN
= 20MHz
F
IN
= 2MHz
F
IN
= 8MHz
F
IN
≃
FS/2
F
IN
= 20MHz
F
IN
= 2MHz
F
IN
= 8MHz
F
IN
≃
FS/2
F
IN
= 20MHz
Signal crosstalk between channels, F
IN1
=
8MHz, F
IN0
= 9.9MHz
60
61.6
61.6
61.6
61.7
SNDR
Signal to Noise and Distortion Ratio
60
61.6
60.5
61.6
80
SFDR
Spurious Free Dynamic Range
70
81
70
80
-90
HD2
Second order Harmonic Distortion
-80
-90
-90
-90
-80
HD3
Third order Harmonic Distortion
-70
-81
-70
-80
10
ENOB
Effective number of Bits
9.7
9.9
9.8
9.9
-105
X
TALK
Crosstalk
Power Supply
AI
DD
DI
DD
Analog Supply Current
Digital Supply Current
Digital core supply
2.5V output driver supply, sine wave input,
F
IN
= 1MHz
2.5V output driver supply, sine wave input,
F
IN
= 1MHz, CLK_EXT disabled
OV
DD
= 2.5V, 5pF load on output bits,
F
IN
= 1MHz, CLK_EXT disabled
OV
DD
= 2.5V, 5pF load on output bits,
F
IN
= 1MHz, CLK_EXT disabled
Power Dissipation, Sleep mode one channel
Power Dissipation, Sleep mode both channels
20
15
8.2
1.7
2.8
2.3
14.8
8.8
23.6
9.9
15.2
7.7
mA
mA
mA
mA
mW
mW
mW
µW
mW
mW
MSPS
MSPS
OI
DD
Output Driver Supply
Analog Power Dissipation
Digital Power Dissipation
Total Power Dissipation
Power Down Dissipation
Sleep Mode 1
Sleep Mode 2
Rev 2B
Clock Inputs
Max. Conversion Rate
Min. Conversion Rate
©2009 CADEKA Microcircuits LLC
www.cadeka.com
6
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
