PRELIMINARY Data Sheet
Pin Assignments (Continued)
Pin No.
Pin Name
D6P
Description
32
LVDS channel 6, positive output
LVDS channel 6, negative output
LVDS channel 7, positive output
LVDS channel 7, negative output
LVDS channel 8, positive output
LVDS channel 8, negative output
LVDS frame clock (1X), positive output
LVDS frame clock (1X), negative output
LVDS bit clock, positive output
LVDS bit clock, negative output
Not connected
31
D6N
30
D7P
29
D7N
28
D8P
27
D8N
26
FCLKP
FCLKN
LCKP
LCKN
NC
25
24
23
54
55
NC
Not connected
56
VCM
NC
Common mode output pin, 0.5*AVDD
Not connected
57
58
NC
Not connected
10
CLKP
CLKN
CSN
Positive differential input clock
Negative differential input clock.
Chip select enable. Active Low
Serial data input
9
40
39
SDATA
SCLK
38
Serial clock input
TQFP
1, 7, 14, 47, 54, 60, 63, 70
AVDD
AVSS
Analog power supply, 1.8V
Analog ground
4, 8, 11, 50, 53, 57, 61, 68, 73,
74, 79, 80
2
IP1
IN1
IP2
Positive differential input signal, channel 1
Negative differential input signal, channel 1
Positive differential input signal, channel 2
Negative differential input signal, channel 2
Positive differential input signal, channel 3
Negative differential input signal, channel 3
Positive differential input signal, channel 4
Negative differential input signal, channel 4
Positive differential input signal, channel 5
Negative differential input signal, channel 5
Positive differential input signal, channel 6
Negative differential input signal, channel 6
Positive differential input signal, channel 7
Negative differential input signal, channel 7
Positive differential input signal, channel 8
Negative differential input signal, channel 8
Digital ground
3
5
6
IN2
IP3
9
10
IN3
IP4
12
13
IN4
IP5
48
49
IN5
IP6
51
52
IN6
IP7
55
56
IN7
IP8
58
59
15, 17, 18, 26, 36, 43, 44, 46
25, 35
IN8
DVSS
DVDD
Digital and I/O power supply, 1.8V
©2009 CADEKA Microcircuits LLC
www.cadeka.com
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