Data Sheet
Pin Assignments - QFN
Pin No.
QFN-64
Pin Name
Description
49, 50, 57
AVDD
AVSS
IP1
Analog power supply, 1.8V
Analog ground
3, 6, 9, 37, 40, 43, 46
1
Positive differential input signal, channel 1
2
4
5
IN1
IP2
IN2
Negative differential input signal, channel 1
Positive differential input signal, channel 2
Negative differential input signal, channel 2
Positive differential input signal, channel 3
Negative differential input signal, channel 3
Positive differential input signal, channel 4
Negative differential input signal, channel 4
7
IP3
IN3
IP4
IN4
8
10
11
38
IP5
IN5
Positive differential input signal, channel 5
Negative differential input signal, channel 5
Positive differential input signal, channel 6
Negative differential input signal, channel 6
Positive differential input signal, channel 7
Negative differential input signal, channel 7
Positive differential input signal, channel 8
Negative differential input signal, channel 8
Digital ground
39
41
IP6
42
IN6
44
IP7
45
47
IN7
IP8
48
IN8
12, 14, 36
35
DVSS
DVDD
Digital and I/O power supply, 1.8V
Power-down input. Activate after applying power in order to initialize the
ADC correctly. Alternatively use the SPI power down feature.
13
PD
15
16
17
18
19
20
21
22
27
28
29
30
31
32
33
34
23
24
25
D1P
D1N
D2P
LVDS channel 1, positive output
LVDS channel 1, negative output
LVDS channel 2, positive output
LVDS channel 2, negative output
LVDS channel 3, positive output
LVDS channel 3, negative output
LVDS channel 4, positive output
LVDS channel 4, negative output
LVDS channel 5, positive output
LVDS channel 5, negative output
LVDS channel 6, positive output
LVDS channel 6, negative output
LVDS channel 7, positive output
LVDS channel 7, negative output
LVDS channel 8, positive output
LVDS channel 8, negative output
LVDS frame clock (1x), positive output
LVDS frame clock (1x), negative output
LVDS bit clock, positive output
D2N
D3P
D3N
D4P
D4N
D5P
D5N
D6P
D6N
D7P
D7N
D8P
D8N
FCLKP
FCLKN
LCLKP
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