Data Sheet
Input
+
-
Rs
G = 5
Output
Input
Output
CL
RL
Rf
Rg
Figure 7. Addition of R for Driving Capacitive Loads
S
Table 1 provides the recommended R for various capacitive
S
loads. The recommended R values result in approximately
S
<1dB peaking in the frequency response. The Frequency
Response vs. C plot, on page 4, illustrates the response
L
of the CLCx008.
Time (200ns/div)
Figure 8. Overdrive Recovery
C (pF)
L
R (Ω)
S
-3dB BW (kHz)
Layout Considerations
10pF
20pF
50pF
100pF
0
22
19
100
100
100
General layout and supply bypassing play major roles in
high frequency performance. CaDeKa has evaluation
boards to use as a guide for high frequency layout and as
an aid in device testing and characterization. Follow the
steps below as a basis for high frequency layout:
12
10.2
Table 1: Recommended R vs. C
S
L
Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
▪
For a given load capacitance, adjust R to optimize the
tradeoff between settling time and bandwidth. In general,
S
reducing R will increase bandwidth at the expense of
additional overshoot and ringing.
Place the 6.8µF capacitor within 0.75 inches of the power pin
S
▪
Place the 0.1µF capacitor within 0.1 inches of the power pin
▪
Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
▪
Overdrive Recovery
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for
the amplifier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range
is exceeded. The CLC1008, CLC1018, and CLC2008 will
typically recover in less than 20ns from an overdrive
condition. Figure 8 shows the CLC1008 in an overdriven
condition.
Minimize all trace lengths to reduce series inductances
▪
Refer to the evaluation board layouts below for more
information.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Evaluation Board #
CEB002
CEB003
Products
CLC1008, CLC1018 in SOT23
CLC1008 in SOIC
CEB006
CLC2008 in SOIC
CEB010
CLC2008 in MSOP
©2009-2011 CADEKA Microcircuits LLC
www.cadeka.com
12
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
