KH300
DATA SHEET
Layout Considerations
To assure optimum performance the user should follow
good layout practices which minimize the unwanted
coupling of signals between nodes. During initial bread-
boarding of the circuit, use direct point to point wiring,
keeping lead lengths to less than 0.25”. The use of
solid, unbroken ground plane is helpful. Avoid wire-wrap
type pc boards and methods. Sockets with small, short
pin receptacles may be used with minimal performance
degradation although their use is not recommended.
+15
and 16. Larger tantalum capacitors should also be
placed within one inch of these pins. To prevent signal
distortion caused by reflections from impedance mis-
matches, use terminated microstrip or coaxial cable
when the signal must traverse more than a few inches.
Since the pc board forms such an important part of the
circuit, much time can be saved if prototype boards of
any high frequency sections are built and tested early in
the design phase.
Controlling Bandwidth and Passband Response
As with any op amp, the ratio of the two feedback resistors
R
f
and R
g
, determines the gain of the KH300. Unlike
conventional op amps, however, the closed loop pole-
zero response of the KH300 is affected very little by the
value of R
g
. R
g
scales the magnitude of the gain, but
does not change the value of the feedback. R
f
does
influence the feedback and so the KH300 has been
internally compensated for optimum performance with
R
f
= 1500Ω, but any value of R
f
> 500Ω may be used
with a single capacitor placed between pins 8 and 12
for compensation. See table 1. As R
f
decreases, C
c
must increase to maintain flat gain. Large values of R
f
and C
c
can be used together or separately to reduce
the bandwidth. This may be desirable for reducing the
noise bandwidth in applications not requiring the full fre-
quency response available.
Table 1: Bandwidth vs. R
f
and C
c
(A
v
= +20)
0.01µF
V
in
R
i
50Ω
R
g
22µF
16
6
8
+
11
KH300
-
24
13
12
R
o
50Ω
1/2 V
o
R
L
50Ω
-15
22µF
0.01µF
Av = 1 +
R
f
R
g
R
f
= 1500Ω (internal)
Figure 1: Recommended Non-inverting Gain Circuit
+15
R
f
(KΩ)
0.01µF
51
22µF
6
16
C
c
(pF)
0
0
0
0
0.3
1.1
1.9
f
±0.3dB
(MHz)
2
3
8
45
90
95
110
f
-3.0dB
(MHz)
5
12
40
85
115
130
135
V
in
R
i
50Ω
R
g
8
+
11
KH300
-
24
13
12
R
o
50Ω
1/2 V
o
R
L
50Ω
10.0
5.0
2.0
1.5
1.0
0.75
0.50
-15
22µF
0.01µF
For Z
in
= 50Ω Select:
R
g
||R
i
= 50
R
f
-Av =
R
g
R
f
= 1500Ω (internal)
Figure 2: Recommended Inverting Gain Circuit
During pc board layout keep all traces short and direct.
R
f
and R
g
should be as close as possible to pin 8 to
minimize capacitance at that point. For the same reason,
remove ground plane from the vicinity of pins 8 and 6.
In other areas, use as much ground plane as possible
on one side of the pc board. It is especially important to
provide a ground return path for current from the load
resistor to the power supply bypass capacitors. Ceramic
capacitors of 0.01 to 0.1µF should be close to pins 13
Low Gain Operation
The small amount of stray capacitance present at the
inverting input can cause peaking which increases with
decreasing gain. The gain setting resistor R
g
is effectively
in parallel with this capacitance and so a frequency
domain pole results. With small R
g
(Gain > 8), this pole
is at a high frequency and it affects the closed loop gain
of the KH300 only slightly. At lower values of gain, this
pole becomes significant. For example, at a gain of +2,
the gain may peak as much as 3dB at 75MHz, and
have a bandwidth exceeding 150MHz. The same
behavior does not exist for low inverting gains, however,
since the inverting input is a virtual ground which main-
tains a constant voltage across the stray capacitance.
Even at inverting gains << 1, the frequency response
remains unchanged.
REV. 1A January 2004
5
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
