TMC1175A
PRODUCT SPECIFICATION
V(1)
V(2)
V(3)
V(4)
Analog input
External Clock
Upper comparators block
Upper data
S (1)
C (1) S (2)
C (2) S (3)
C (3)
S (4)
C (4)
MD (0)
MD (1)
MD (2)
MD (3)
Lower reference voltage
RV (0)
RV (1)
RV (2)
RV (3)
Lower comparators A block
Lower data A
S (1)
H (1)
LD (-1)
C (1)
S (3)
H (3)
LD (1)
C (3)
Lower comparators B block
Lower data B
H (0)
LD(-2)
C (0)
S (2)
H (2)
LD(0)
C (2)
S (4)
H (94)
LD(2)
Digital output
Out(-2)
Out(-1)
Out(0)
Out(1)
65-7568
Figure 3. Internal Timing
Pin Assignments
OE 1
D
GND
2
D
0
3
D
1
4
D
2
5
D
3
6
D
4
7
D
5
8
D
6
9
D
7
10
V
DDD
11
CONV 12
M7 Package
24
23
22
21
20
19
18
17
16
15
14
13
D
GND
R
B
VR–
A
GND
A
GND
V
IN
V
DDA
R
T
VR+
V
DDA
V
DDA
V
DDD
25
24
23
22
21
20
19
18
17
16
15
14
13
A GND
A GND
VIN
N/C
VDDA
RT
VR+
VR– 26
R
B
27
D
GND
28
N/C 1
OE 2
D
GND
3
D
0
4
D1 5
D2 6
D3 7
N/C 8
D4 9
D5 10
D6 11
V
DDA
V
DDA
V
DDD
N/C
CONV
V
DDD
12 D
7
R3 Package
24454A
4
REV. 1.3.3 2/28/02
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
