CM3107
Application Information (cont’d)
VCC (CPU Core)
GMCH_EN
V
DDQSEL
"1"
Open or "0"
Open or "0"
FSBSEL
Don’t Care
"0"
"1"
V
TT
V
DDQSEL
/2
(Note1)
1.225V
1.45V
NOTE
For DDR
For FSB
For FSB
GMCHVCCP
Note 1:Assumes V
DDQ
and V
DDQSEL
are tied
together in DDR application.
Figure 20. Front Side Bus Timing diagram
PCB Layout Considerations
The CM3107-00SB has a heat spreader attached to
the underneath of the PSOP-8 package in order for
heat to be transferred much easier from the package to
the PCB. The heat spreader is a copper pad of dimen-
sions just smaller than the package itself. By position-
ing the matching pad on the PCB top layer to connect
to the spreader during manufacturing, the heat will be
transferred between the two pads. The drawing below
shows the recommended PCB layout. Note that there
are six vias on either side to allow the heat to dissipate
into the ground and power planes on the inner layers of
Table 1: V
TT
Output Selection Truth Table.
the PCB. Vias can be placed underneath the chip, but
this can cause blockage of the solder. The ground and
power planes should be at least 2 sq in. of copper by
the vias. It also helps dissipation to spread if the chip is
positioned away from the edge of the PCB, and not
near other heat dissipating devices. A good thermal
link from the PCB pad to the rest of the PCB will ensure
a thermal link from the CM3107 package to ambient,
θ
JA
, of around 40°C/W.
Table 2: Recommended Heat Sink PCB Layout
© 2004 California Micro Devices Corp. All rights reserved.
02/02/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
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Tel: 408.263.3214
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Fax: 408.263.7846
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www.calmicro.com
11
CALMIRCO [ CALIFORNIA MICRO DEVICES CORP ]
