CALIFORNIA MICRO DEVICES
CSPDDR100
Chip Scale DDR Termination Array
Features
• 16 Integrated High frequency Series/Parallel
Terminations
• Ultra small footprint Chip Scale Package
• Ceramic substrate
• 0.35mm Eutectic Solder Bumps, 0.65mm Pitch
Applications
• DDR Memory bus termination
• SSTL Termination
Product Description
The CSPDDR100 is a high performance Integrated
Passive Device (IPD) which provides Series/Parallel
terminations suitable for use in SSTL and DDR termina-
tion applications. Sixteen (16) Series/Parallel termination
channels are provided for a total of 32 integrated
resistors. These resistors provide excellent high fre-
quency performance in excess of 3GHz and are manu-
factured to an absolute tolerance of ±1%. The Chip
Scale Package provides an ultra small footprint for
this Integrated Passive Device and provides minimal
parasitics compared to conventional packaging. Typical
bump inductance is less than 25pH. The large solder
bumps and ceramic substrate allow for standard attach-
ment to laminate printed circuit boards without the use
of underfill. The 4X9 Bump pattern is arranged for easy
flow through routing on the pcb.
SCHEMATIC DIAGRAM
D
R1
R1
R1
R1
R1
R1
R1
R1
C
R2
R2
R2
R2
R2
R2
R2
R2
R2
B
R1
A
1
2
R2
R2
R2
R2
R2
R2
R2
R1
R1
R1
R1
R1
R1
R1
3
4
5
6
7
8
9
S TA N D A R D PA R T O R D E R I N G I N F O R M AT I O N
Package
Style
Chip Scale
Bumps
36
Tape & Reel
CSPDDR100
Ordering Part Number
Part Marking
Ink dot to mark bump A1
© 2000 California Micro Devices Corp. All rights reserved.
7/21/2000
C1260700
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
1
CALMIRCO [ CALIFORNIA MICRO DEVICES CORP ]
