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CWB201 参数 Datasheet PDF下载

CWB201图片预览
型号: CWB201
PDF下载: 下载PDF文件 查看货源
内容描述: 100MHz的CMOS / DMOS宽带四路模拟开关 [100MHz CMOS/DMOS Wideband Quad Analog Switch]
分类和应用: 开关
文件页数/大小: 5 页 / 57 K
品牌: CALOGIC [ CALOGIC, LLC ]
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100MHz CMOS/DMOS
Wideband Quad Analog Switch
CORPORATION
CWB201
FEATURES
DESCRIPTION
Designed for RF and Video Switching the CWB201 is
manufactured using Calogic’s high speed CMOS combined
with DMOS transistors in a monolithic design resulting in
superior performance characteristics. This quad SPST switch
array has extensive applications where high frequency video,
audio or digital signals are switched or routed. The CWB201
is TTL compatible which is of great benefit to to designs that
require constant logic switching over a wide range of supply
voltages and temperature without a separate power supply.
ORDERING INFORMATION
Part
CWB201CP
CWB201CY
XCWB201
Package
Temperature Range
Plastic 16-Pin Dip
0 to +85
o
C
Plastic SO-16 Surface Mount 0 to +85
o
C
Sorted Chips in Carriers
0 to +85
o
C
Wide Bandwidth Switches . . . . . . . . 0.9 x DC @ 100MHz
High OFF Isolation. . . . . . . . . . . . . . . . . 66 dB @ 100MHz
Channel-to-Channel Crosstalk. . . -80 dB @ 10MHz
Low Compatible
TTL
Low ON Resistance
Speed
HighCapaciatance
Low
Glitch-Free Analog Switches
RF & Video Switches
Track-and-Hold Switches
Sample-and-Hold Switches
High Speed Data Routing
PIN CONFIGURATION
CWB201CP
APPLICATIONS
FUNCTIONAL BLOCK DIAGRAM
S
1
IN1
D1
S1
V-
GND
S4
D4
IN4
1
2
3
4
5
6
7
8
TOP VIEW
16 IN2
15 D2
14 S2
13 V+
12 N/C
11 S3
10 D3
9
IN3
IN
1
D
1
S
2
IN
2
D
2
S
3
IN
3
D
3
S
4
IN
4
D
4
Four SPST Switches per Package.
Switches shown in Logic '1' Input Position.
CWB201CY
IN1
D1
S1
V-
GND
S4
D4
IN4
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
IN2
D2
S2
V+
N/C
S3
D3
IN3
LOGIC TABLE
Logic
0
1
Switch
ON
OFF
Logic ’0’
0.8V
Logic ’1’
2.42V
NOTE:
All devices contain diodes to protect inputs against
damage due to high static voltages or electric fields;
however, it is advised that precautions be taken not to
exceed the maximum recommended input voltages. All
unused inputs must be connected to an appropriate logic
level (V
DD
or GND).
CWB