®
®
ADCDS-1403
14-Bit, 3 Megapixels/Second
Imaging Signal Processor
FEATURES
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14-bit resolution
3MPPS throughput rate (14-bits)
Functionally complete
Very low noise
Excellent Signal-to-Noise ratio
Edge triggered
Small, 40-pin, TDIP package
Low power, 500mW typical
Low cost
Programmable Analog Bandwidth
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
INPUT/OUTPUT CONNECTIONS
FUNCTION
FINE GAIN ADJUST
OFFSET ADJUST
DIRECT INPUT
INVERTING INPUT
NON-INVERTING INPUT
+2.4V REF. OUTPUT
ANALOG GROUND
NO CONNECT
NO CONNECT
BIT 14 (LSB)
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
PIN
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
FUNCTION
NO CONNECT
+12V
–5VA
ANALOG GROUND
+5VA
ANALOG GROUND
+5VD
DIGITAL GROUND
DIGITAL GROUND
A1
A
NO CONNECT
NO CONNECT
DATA VALID
REFERENCE HOLD
START CONVERT
OUT-OF-RANGE
BIT 1 (MSB)
BIT 2
BIT 3
GENERAL DESCRIPTION
The ADCDS-1403 is an application-specific video signal
processor designed for electronic-imaging applications that
employ CCD's (charge coupled devices) as their
photodetector. The ADCDS-1403 incorporates a "user
configurable" input amplifier, a CDS (correlated double
sampler) and a sampling A/D converter in a single package,
providing the user with a complete, high performance, low-
cost, low-power, integrated solution.
The key to the ADCDS-1403's performance is a unique, high-
speed, high-accuracy CDS circuit, which eliminates the
effects of residual charge, charge injection and "kT/C" noise
on the CCD's output floating capacitor, producing a "valid
video" output signal. The ADCDS-1403 digitizes this resultant
"valid video" signal using a high-speed, low-noise sampling
A/D converter.
The ADCDS-1403 requires only the rising edge of start
convert pulse to initiate its conversion process. Additional
features of the ADCDS-1403 include gain adjust, offset
adjust, precision +2.4V reference, and a programmable
analog bandwidth function.
+12V
A
39
759
INVERTING INPUT 4
5239
–5V
A
38
+5V
A
36
+5V
D
34
INPUT AMPLIFIER
0.01µF
DIRECT INPUT 3
NON-INVERTING INPUT 5
5K
9
CORRELATED
DOUBLE
SAMPLER
25 START CONVERT
1 FINE GAIN ADJUST
23 BIT 1 (MSB)
SAMPLING
A/D
10 BIT 14 (LSB)
OFFSET ADJUST 2
REFERENCE HOLD 26
TIMING
AND
CONTROL
24 OUT-OF-RANGE
6
+2.4V REFERENCE OUTPUT
32, 33
DIGITAL GROUND
27
DATA VALID
30 31
AØ A1
7, 35, 37
ANALOG GROUND
Figure 1. ADCDS-1403 Functional Block Diagram
DATEL, Inc., Mansfield, MA 02048 (USA)
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Tel: (508) 339-3000, (800) 233-2765 Fax: (508) 339-6356
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Email: sales@datel.com
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Internet: www.datel.com
CANDD [ C&D TECHNOLOGIES ]
