CAT1232, CAT1832
¯¯
WATCHDOG TIMER AND ST INPUT
A watchdog timer stops and restarts a microprocessor
that has stopped proper operation or become “hung”.
The watchdog performs this function by monitoring the
Watchdog Time-out Period (ms)
TD Voltage
Level
MIN
62.5
250
500
NOMINAL
150
MAX
250
GND
Floating
VCC
¯¯
¯¯
ST input. After the reset outputs go inactive the ST
input must be strobed with a high-to-low signal
transition prior to the minimum watchdog timeout
600
1000
2000
1200
¯¯
period. However if the ST input is not strobed with a
high-to-low signal transition prior to a watchdog
timeout the reset outputs will become active for TRST
reseting and restarting the microprocessor. Once the
resets return to the inactive state the watchdog timer
restarts the process.
3.3V
CAT1832
8
7
6
5
1
2
3
4
PBRST
TD
V
CC
I/O
ST
µP
The TD input allows the user to select from three
predetermined watchdog timeout periods. Always use
the minimum timeout period to determine the required
TOL
RESET
GND RESET
RESET
¯¯
frequency of ST high-to-low transitions and the
maximum to determine the time prior to the reset
¯¯
outputs becoming active. ST pulse widths must be
20ns or greater.
Figure 4. CAT1832 Application Circuit:
Pushbutton Reset
The watchdog timer cannot be disabled. It must be
strobed with a high-to-low signal transition to avoid a
watchdog timeout and subsequent reset.
5V
CAT1232LP
1
2
3
4
8
7
6
5
MREQ
PBRST
TD
V
CC
10kꢀ
ST
µP
RESET
Decoder
TOL
RESET
Address Bus
GND RESET
Figure 5. CAT1232LP Application Circuit: Watchdog Timer
tPB
tPDLY
Valid
Strobe
Valid
Strobe
Invalid
Strobe
PBRST
ST
V
IH
V
IL
tST
tTD
tRST
tTD
(Min)
tRST
(Min)
RESET
RESET
RESET
RESET
VOH
VOL
Note: ST is ignored whenever a reset is active
Figure 7. Timing Diagram: Strobe Input
Figure 6. Timing Diagram: Pushbutton Reset
Doc. No. MD-3018 Rev. D
6
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CATALYST [ CATALYST SEMICONDUCTOR ]
