CAT24C03/05
FEATURES
2-Kb and 4-Kb I
2
C Serial EEPROM with Partial Array Write Protection
DEVICE DESCRIPTION
The CAT24C03/CAT24C05 is a 2-kb/4-kb CMOS Serial
EEPROM device organized internally as 16/32 pages
of 16 bytes each, for a total of 256x8/512x8 bits. These
devices support both Standard (100kHz) as well as Fast
(400kHz) I
2
C protocol.
Data is written by providing a starting address, then
loading 1 to 16 contiguous bytes into a Page Write
Buffer, and then writing all data to non-volatile memory
in one internal write cycle. Data is read by providing a
starting address and then shifting out data serially while
automatically incrementing the internal address count.
Write operations can be inhibited for upper half of memory
by taking the WP pin High.
External address pins make it possible to address
up to eight CAT24C03 or four CAT24C05 devices on the
same bus.
■
Supports Standard and Fast I
2
C Protocol
■
1.8 V to 5.5 V Supply Voltage Range
■
16-Byte Page Write Buffer
■
Hardware Write Protection for upper half of
memory
■
Schmitt Triggers and Noise Suppression Filters
on I
2
C Bus Inputs (SCL and SDA).
■
Low power CMOS technology
■
1,000,000 program/erase cycles
■
100 year data retention
■
Industrial temperature range
■
RoHS-compliant 8-lead PDIP, SOIC, and TSSOP,
8-pad TDFN and 5-lead TSOT-23 packages.
PIN CONFIGURATION
PDIP (L)
SOIC (W)
TSSOP (Y)
TDFN (VP2)
CAT24C05 / 03
NC / A0
A1 / A1
A2 / A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
SCL
VSS
SDA
1
2
3
4
VCC
5
WP
FUNCTIONAL SYMBOL
VCC
TSOT-23 (TD)
SCL
A2, A1, A0
WP
CAT24C03
CAT24C05
SDA
For the location of Pin 1, please consult the corresponding package drawing.
PIN FUNCTIONS
A
0
, A
1
, A
2
SDA
SCL
WP
V
CC
V
SS
NC
Device Address Inputs
Serial Data Input/Output
Serial Clock Input
Write Protect Input
Power Supply
Ground
No Connect
* Catalyst carries the I
2
C protocol under a license from the Philips Corporation.
VSS
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1116, Rev. B
CATALYST [ CATALYST SEMICONDUCTOR ]
