CAT24C256
256-Kb I
2
C CMOS Serial EEPROM
fEATuRES
n
Supports Standard and fast I
2
C Protocol
n
1.8 V to 5.5 V Supply Voltage Range
n
64-byte Page Write buffer
n
Hardware Write Protection for entire memory
n
Schmitt Triggers and noise Suppression filters
DEVICE DESCRIPTIOn
The CAT24C256 is a 256-Kb Serial CMOS EEPROM,
internally organized as 52 pages of 64 bytes each, for
a total of 32,768 bytes of 8 bits each.
It features a 64-byte page write buffer and supports
both the Standard (00 kHz) as well as Fast (400 kHz)
I
2
C protocol.
Write operations can be inhibited by taking the WP pin
High (this protects the entire memory).
External address pins make it possible to address up to
eight CAT24C256 devices on the same bus.
on I
2
C bus Inputs (SCl and SDA).
n
low power CMOS technology
n
1,000,000 program/erase cycles
n
100 year data retention
n
Industrial temperature range
n
RoHS-compliant 8-pin PDIP and SOIC packages
PIn COnfIguRATIOn
PDIP (l)
SOIC (W, X)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
funCTIOnAl SyMbOl
VCC
SCL
A2, A1, A0
WP
CAT24C256
SDA
For the location of Pin , please consult the
corresponding package drawing.
PIn funCTIOnS
A
0
, A
, A
2
SDA
SCL
WP
V
CC
V
SS
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
VSS
* Catalyst carries the I
2
C protocol under a license from the Philips Corporation.
© 2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 04, Rev. D