Preliminary
CAT24WC128
128K-Bit I
2
C Serial CMOS E
2
PROM
FEATURES
s
1MHz I
2
C Bus Compatible*
s
1.8 to 6 Volt Operation
s
Low Power CMOS Technology
s
64-Byte Page Write Buffer
s
Self-Timed Write Cycle with Auto-Clear
s
Commercial, Industrial and Automotive
s
Write Protect Feature
– Entire Array Protected When WP at V
IH
s
100,000 Program/Erase Cycles
s
100 Year Data Retention
s
8-Pin DIP, 8-Pin SOIC or 14-pin TSSOP
Temperature Ranges
DESCRIPTION
The CAT24WC128 is a 128K-bit Serial CMOS E
2
PROM
internally organized as 16384 words of 8 bits each.
Catalyst’s advanced CMOS technology substantially
reduces device power requirements. The
CAT24WC128 features a 64-byte page write buffer. The
device operates via the I
2
C bus serial interface and is
available in 8-pin DIP, 8-pin SOIC or 14-pin TSSOP
packages.
PIN CONFIGURATION
DIP Package (P)
NC
NC
NC
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
BLOCK DIAGRAM
EXTERNAL LOAD
TSSOP Package (U14)
NC
NC
NC
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
WP
NC
NC
NC
SCL
SDA
DOUT
ACK
VCC
VSS
WORD ADDRESS
BUFFERS
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
512
SOIC Package (J,K)
NC
NC
NC
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
NC
NC
VSS
SDA
START/STOP
LOGIC
XDEC
WP
CONTROL
LOGIC
256
E
2
PROM
256X512
24WC128 F01
PIN FUNCTIONS
Pin Name
SDA
SCL
WP
V
CC
V
SS
Function
Serial Data/Address
Serial Clock
Write Protect
+1.8V to +6V Power Supply
SCL
STATE COUNTERS
HIGH VOLTAGE/
TIMING CONTROL
DATA IN STORAGE
Ground
24WC128 F02
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
© 1999 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 25060-00 6/99
S-1
CATALYST [ CATALYST SEMICONDUCTOR ]
