CAT24C03
FEATURES
2-Kb I
2
C CMOS Serial EEPROM with Partial Array Write Protection
DEVICE DESCRIPTION
The CAT24C03 is a 2-Kb Serial CMOS EEPROM,
internally organized as 16 pages of 16 bytes each, for
a total of 256 bytes of 8 bits each.
It features a 16-byte page write buffer and supports
both the Standard (100 kHz) as well as Fast (400 kHz)
I
2
C protocol.
Write operations can be inhibited by taking the WP pin
High (this protects the upper half of the memory).
The CAT24C03 is available in RoHS compliant “Green”
and “Gold” 8-lead PDIP, SOIC, TSSOP and TDFN
packages.
■
Supports Standard and Fast I
2
C Protocol
■
1.8 V to 5.5 V Supply Voltage Range
■
16-Byte Page Write Buffer
■
Hardware Write Protection for upper half of
memory
■
Schmitt Triggers and Noise Suppression Filters
on I
2
C Bus Inputs (SCL and SDA).
■
Low power CMOS technology
■
1,000,000 program/erase cycles
■
100 year data retention
■
RoHS compliant
8-pin PDIP, SOIC, TSSOP and TDFN packages
“
”
&
“
”
■
Industrial temperature range
PIN CONFIGURATION
PDIP (L)
SOIC (W)
TSSOP (Y)
TDFN (VP2)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
FUNCTIONAL SYMBOL
VCC
SCL
A2, A1, A0
WP
CAT24C03
SDA
For the location of Pin 1, please consult the
corresponding package drawing.
PIN FUNCTIONS
A
0
, A
1
, A
2
SDA
SCL
WP
V
CC
V
SS
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
VSS
* Catalyst carries the I
2
C protocol under a license from the Philips Corporation.
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1113, Rev. A
CATALYST [ CATALYST SEMICONDUCTOR ]
