Advanced
CAT25C03/05/09/17/33
2K/4K/8K/16K/32K SPI Serial CMOS E
2
PROM
FEATURES
s
10 MHz SPI Compatible
s
1.8 to 6.0 Volt Operation
s
Hardware and Software Protection
s
Zero Standby Current
s
Low Power CMOS Technology
s
SPI Modes (0,0 &1,1)
s
Commercial, Industrial and Automotive
s
1,000,000 Program/Erase Cycles
s
100 Year Data Retention
s
Self-Timed Write Cycle
s
8-Pin DIP/SOIC, 16-Pin SOIC and 14-Pin TSSOP
s
Page Write Buffer
s
Write Protection
Temperature Ranges
– Protect First Page, Last Page, Any 1/4 Array
or Lower 1/2 Array
DESCRIPTION
The CAT25C03/05/09/17/33 is a 2K/4K/8K/16K/32K-Bit
SPI Serial CMOS E
2
PROM internally organized as
256x8/512x8/1024x8/2048x8/4096x8 bits. Catalyst’s
advanced CMOS Technology substantially reduces de-
vice power requirements. The CAT25C03/05 features a
16-byte page write buffer. The 25C09/17/33 features a
32-byte page write buffer.The device operates via the
SPI bus serial interface and is enabled though a Chip
Select (CS). In addition to the Chip Select, the clock
input (SCK), data in (SI) and data out (SO) are required
to access the device. The
HOLD
pin may be used to
suspend any serial communication without resetting the
serial sequence. The CAT25C03/05/09/17/33 is de-
signed with software and hardware write protection
features. The device is available in 8-pin DIP, 8-pin
SOIC, 16-pin SOIC, 8-pin TSSOP and 14-pin TSSOP
packages.
PIN CONFIGURATION
TSSOP Package (U14) SOIC Package (S16) SOIC Package (S) DIP Package (P)
CS
SO
NC
NC
NC
WP
V
SS
TSSOP Package (U)
1
2
3
4
8
7
6
5
VCC
HOLD
SCL
SI
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
HOLD
NC
NC
NC
SCK
SI
CS
SO
NC
NC
NC
NC
WP
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
HOLD
NC
NC
NC
NC
SCK
SI
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
CS
HOLD
SO
SCK
WP
SI
VSS
1
2
3
4
8
7
6
5
VCC
CS
HOLD
SO
SCK
SI
WP
VSS
BLOCK DIAGRAM
SENSE AMPS
SHIFT REGISTERS
PIN FUNCTIONS
Pin Name
SO
SCK
WP
V
CC
V
SS
CS
SI
HOLD
NC
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
Function
Serial Data Output
Serial Clock
Write Protect
+1.8V to +6.0V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
STATUS
REGISTER
HIGH VOLTAGE/
TIMING CONTROL
25C128 F02
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
CONTROL LOGIC
XDEC
E
2
PROM
ARRAY
DATA IN
STORAGE
© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 25068-00 2/98
CATALYST [ CATALYST SEMICONDUCTOR ]
