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CAT28C64BT13I-12 参数 Datasheet PDF下载

CAT28C64BT13I-12图片预览
型号: CAT28C64BT13I-12
PDF下载: 下载PDF文件 查看货源
内容描述: 64K位CMOS并行E2PROM [64K-Bit CMOS PARALLEL E2PROM]
分类和应用: 可编程只读存储器
文件页数/大小: 12 页 / 60 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT28C64B
DATA Polling
DATA polling is provided to indicate the completion of
write cycle. Once a byte write or page write cycle is
initiated, attempting to read the last byte written will
output the complement of that data on I/O
7
(I/O
0
–I/O
6
are indeterminate) until the programming cycle is com-
plete. Upon completion of the self-timed write cycle, all
I/O’s will output true data during a read cycle.
Toggle Bit
In addition to the DATA Polling feature, the device offers
an additional method for determining the completion of
a write cycle. While a write cycle is in progress, reading
data from the device will result in I/O
6
toggling between
one and zero. However, once the write is complete, I/O
6
stops toggling and valid data can be read from the
device.
Figure 7. DATA Polling
ADDRESS
CE
WE
tOEH
OE
tWC
I/O7
DIN = X
DOUT = X
DOUT = X
28C64B F10
tOE
tOES
Figure 8. Toggle Bit
WE
CE
tOEH
OE
tOE
tOES
I/O6
(1)
tWC
(1)
28C64B F11
Note:
(1) Beginning and ending state of I/O
6
is indeterminate.
9
Doc. No. 25006-0A 2/98 P-1